From patchwork Fri Apr 7 10:38:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 748161 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3vzwzx1jtdz9s7q for ; Fri, 7 Apr 2017 20:39:09 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 03EB1C21C61; Fri, 7 Apr 2017 10:39:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 09D4EC21C44; Fri, 7 Apr 2017 10:39:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0F1ACC21C44; Fri, 7 Apr 2017 10:39:00 +0000 (UTC) Received: from gloria.sntech.de (gloria.sntech.de [95.129.55.99]) by lists.denx.de (Postfix) with ESMTPS id 28B58C21C3F for ; Fri, 7 Apr 2017 10:38:59 +0000 (UTC) Received: from ip9234b3c2.dynamic.kabel-deutschland.de ([146.52.179.194] helo=phil.fritz.box) by gloria.sntech.de with esmtpsa (TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1cwRIA-0002Ag-HL; Fri, 07 Apr 2017 12:38:58 +0200 From: Heiko Stuebner To: sjg@chromium.org Date: Fri, 7 Apr 2017 12:38:52 +0200 Message-Id: <20170407103852.16687-1-heiko@sntech.de> X-Mailer: git-send-email 2.11.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH] rockchip: sysreset: rk3188: Make sure remap is off on warm-resets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The warm-reset of rk3188 socs keeps the remap setting as it was, so if it was enabled, the cpu would start from address 0x0 of the sram instead of address 0x0 of the bootrom, thus making the reset hang. Therefore make sure the remap is disabled before attempting a warm reset. Cold reset is not affected by this at all. Signed-off-by: Heiko Stuebner Acked-by: Simon Glass --- drivers/sysreset/sysreset_rk3188.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c index 36ae47600a..053a6344f5 100644 --- a/drivers/sysreset/sysreset_rk3188.c +++ b/drivers/sysreset/sysreset_rk3188.c @@ -7,21 +7,36 @@ #include #include #include +#include #include #include #include #include +#include #include #include int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type) { struct rk3188_cru *cru = rockchip_get_cru(); + struct rk3188_grf *grf; if (IS_ERR(cru)) return PTR_ERR(cru); switch (type) { case SYSRESET_WARM: + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(grf)) + return -EPROTONOSUPPORT; + + /* + * warm-reset keeps the remap value, + * so make sure it's disabled. + */ + rk_clrsetreg(&grf->soc_con0, + NOC_REMAP_MASK << NOC_REMAP_SHIFT, + 0 << NOC_REMAP_SHIFT); + rk_clrreg(&cru->cru_mode_con, 0xffff); writel(0xeca8, &cru->cru_glb_srst_snd_value); break;