[U-Boot] rockchip: sysreset: rk3188: Make sure remap is off on warm-resets
diff mbox

Message ID 20170407103852.16687-1-heiko@sntech.de
State Accepted
Commit 4e5439ac25486e34568d96f99fefb464a857855c
Delegated to: Simon Glass
Headers show

Commit Message

Heiko Stuebner April 7, 2017, 10:38 a.m. UTC
The warm-reset of rk3188 socs keeps the remap setting as it was, so if
it was enabled, the cpu would start from address 0x0 of the sram instead
of address 0x0 of the bootrom, thus making the reset hang.

Therefore make sure the remap is disabled before attempting a warm reset.

Cold reset is not affected by this at all.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 drivers/sysreset/sysreset_rk3188.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Simon Glass April 9, 2017, 7:28 p.m. UTC | #1
On 7 April 2017 at 04:38, Heiko Stuebner <heiko@sntech.de> wrote:
> The warm-reset of rk3188 socs keeps the remap setting as it was, so if
> it was enabled, the cpu would start from address 0x0 of the sram instead
> of address 0x0 of the bootrom, thus making the reset hang.
>
> Therefore make sure the remap is disabled before attempting a warm reset.
>
> Cold reset is not affected by this at all.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  drivers/sysreset/sysreset_rk3188.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)

Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass April 14, 2017, 10:15 a.m. UTC | #2
On 9 April 2017 at 13:28, Simon Glass <sjg@chromium.org> wrote:
> On 7 April 2017 at 04:38, Heiko Stuebner <heiko@sntech.de> wrote:
>> The warm-reset of rk3188 socs keeps the remap setting as it was, so if
>> it was enabled, the cpu would start from address 0x0 of the sram instead
>> of address 0x0 of the bootrom, thus making the reset hang.
>>
>> Therefore make sure the remap is disabled before attempting a warm reset.
>>
>> Cold reset is not affected by this at all.
>>
>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>>  drivers/sysreset/sysreset_rk3188.c | 15 +++++++++++++++
>>  1 file changed, 15 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-rockchip, thanks!

Patch
diff mbox

diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c
index 36ae47600a..053a6344f5 100644
--- a/drivers/sysreset/sysreset_rk3188.c
+++ b/drivers/sysreset/sysreset_rk3188.c
@@ -7,21 +7,36 @@ 
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <syscon.h>
 #include <sysreset.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3188.h>
+#include <asm/arch/grf_rk3188.h>
 #include <asm/arch/hardware.h>
 #include <linux/err.h>
 
 int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
 {
 	struct rk3188_cru *cru = rockchip_get_cru();
+	struct rk3188_grf *grf;
 
 	if (IS_ERR(cru))
 		return PTR_ERR(cru);
 	switch (type) {
 	case SYSRESET_WARM:
+		grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		if (IS_ERR(grf))
+			return -EPROTONOSUPPORT;
+
+		/*
+		 * warm-reset keeps the remap value,
+		 * so make sure it's disabled.
+		 */
+		rk_clrsetreg(&grf->soc_con0,
+			NOC_REMAP_MASK << NOC_REMAP_SHIFT,
+			0 << NOC_REMAP_SHIFT);
+
 		rk_clrreg(&cru->cru_mode_con, 0xffff);
 		writel(0xeca8, &cru->cru_glb_srst_snd_value);
 		break;