From patchwork Fri Apr 7 00:42:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marty Plummer X-Patchwork-Id: 748009 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vzgjJ6Rsjz9s78 for ; Fri, 7 Apr 2017 10:40:36 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="e9/aqi0x"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754281AbdDGAkf (ORCPT ); Thu, 6 Apr 2017 20:40:35 -0400 Received: from mail-oi0-f65.google.com ([209.85.218.65]:33971 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753549AbdDGAkf (ORCPT ); Thu, 6 Apr 2017 20:40:35 -0400 Received: by mail-oi0-f65.google.com with SMTP id c23so5447974oig.1 for ; Thu, 06 Apr 2017 17:40:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:mime-version:content-disposition :user-agent; bh=+Yc+no/9IQDcXAzZ7mxWOtJ+EouAc9Np7tAd1ND2d2k=; b=e9/aqi0x1Z6qt6j3QYkh0teFDT7AA4cGDyuvuqzxdrMLoheMk1gFRy3AwlsGlU/IUC jZoW+0Pr451B9H+2u66u+6HgzuJRnj4PDK36HUXZ80Q/fcTT5AOxtEwAVTdOElO46TSW NU7Li5spbTkJaixwRx9xv5AnNvijDm8Rs7knPj5dhB5jp8JY5HVjhS1g/MF4rdJOjm31 WQyMW0AZFh6Lg0KAyr7/S300EedcnlXdQA7dvJ8H6243XLAubVr1Ft72vMOHVP10aoA2 OoUvYTxhu7U4IYr2HV3GH4Ep1E29M0M5CpSguy2gNEpQnXUyPo7ggMuh3Ad9x6FY3d31 ZT2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:mime-version :content-disposition:user-agent; bh=+Yc+no/9IQDcXAzZ7mxWOtJ+EouAc9Np7tAd1ND2d2k=; b=KbCusR8fgClLj6LKoRg8xo8ycbGkQNTYnHiDYihdMXT/oja8F2zfEOrnXZ/W/TSC/7 7lntYyKgp8bFDJgWHXde1Cd8DeNVuQ+5RpSoYnmzMmwv5ROFvwsBWSiGxIiZys+qrNkF JGnAh4aDT4OlcpHR2N+RpnBl435LykwaNriS+H5NUIk685B2SVNqD2n9TyZ1Y94sts2q 6WvyMTSei0kuevB6215jd1wQyUbe+hXUMtS7rbUMK5K0Gxbv/wd7F2JMXdLba9onyqT5 5wiKZUhItd6YLHGzUhzOt2o6UpMvz9C796f61HIboCpM55JJvcoXTTZ3Dq1p5TD30zOh XIPQ== X-Gm-Message-State: AFeK/H0ElkNdVXQKxqqRGeKFmTPIjp/UtaAIrrjnf/S+AfMbaZp1QQcqXR+hqIODSC+Dhw== X-Received: by 10.202.221.130 with SMTP id u124mr20637770oig.135.1491525634265; Thu, 06 Apr 2017 17:40:34 -0700 (PDT) Received: from tha-monstah.mydomain (cpe-72-176-85-27.stx.res.rr.com. [72.176.85.27]) by smtp.gmail.com with ESMTPSA id j125sm1436378oib.27.2017.04.06.17.40.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Apr 2017 17:40:34 -0700 (PDT) Date: Thu, 6 Apr 2017 19:42:06 -0500 From: Marty Plummer To: linux-gpio@vger.kernel.org Cc: linus.walleij@linaro.org, gnurou@gmail.com Subject: [PATCH] gpio: f7188x: Add F71889A GPIO support. Message-ID: <20170407004205.45btnkgk7k5jv3td@tha-monstah.mydomain> MIME-Version: 1.0 Content-Disposition: inline User-Agent: NeoMutt/20170128 (1.7.2) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add F71889A GPIO support. Fintek F71889A is a SuperIO. It contains HWMON/GPIO/Serial Ports. Datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459076/FINTEK/F71889A.html Its virtually identical to the F71889F superio as far as gpios go. One oddity is GPIO2 at index 0xD0; the datasheet only lists gpio's 7-5, but it logically seems that it should continue down to 0. I'm not sure if the driver can handle gpios that are shifted away from index 0 as it currently stands. Signed-off-by: Marty Plummer Acked-by: Simon Guinot --- drivers/gpio/gpio-f7188x.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c index 56bd76c33767..c013ff5deb70 100644 --- a/drivers/gpio/gpio-f7188x.c +++ b/drivers/gpio/gpio-f7188x.c @@ -37,14 +37,16 @@ #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */ #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */ #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */ +#define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */ #define SIO_F81866_ID 0x1010 /* F81866 chipset ID */ -enum chips { f71869, f71869a, f71882fg, f71889f, f81866 }; +enum chips { f71869, f71869a, f71882fg, f71889a, f71889f, f81866 }; static const char * const f7188x_names[] = { "f71869", "f71869a", "f71882fg", + "f71889a", "f71889f", "f81866", }; @@ -187,6 +189,17 @@ static struct f7188x_gpio_bank f71882_gpio_bank[] = { F7188X_GPIO_BANK(40, 4, 0xB0), }; +static struct f7188x_gpio_bank f71889a_gpio_bank[] = { + F7188X_GPIO_BANK(0, 7, 0xF0), + F7188X_GPIO_BANK(10, 7, 0xE0), + F7188X_GPIO_BANK(20, 8, 0xD0), + F7188X_GPIO_BANK(30, 8, 0xC0), + F7188X_GPIO_BANK(40, 8, 0xB0), + F7188X_GPIO_BANK(50, 5, 0xA0), + F7188X_GPIO_BANK(60, 8, 0x90), + F7188X_GPIO_BANK(70, 8, 0x80), +}; + static struct f7188x_gpio_bank f71889_gpio_bank[] = { F7188X_GPIO_BANK(0, 7, 0xF0), F7188X_GPIO_BANK(10, 7, 0xE0), @@ -382,6 +395,9 @@ static int f7188x_gpio_probe(struct platform_device *pdev) data->nr_bank = ARRAY_SIZE(f71882_gpio_bank); data->bank = f71882_gpio_bank; break; + case f71889a: + data->nr_bank = ARRAY_SIZE(f71889a_gpio_bank); + data->bank = f71889a_gpio_bank; case f71889f: data->nr_bank = ARRAY_SIZE(f71889_gpio_bank); data->bank = f71889_gpio_bank; @@ -443,6 +459,9 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio) case SIO_F71882_ID: sio->type = f71882fg; break; + case SIO_F71889A_ID: + sio->type = f71889a; + break; case SIO_F71889_ID: sio->type = f71889f; break; @@ -538,6 +557,6 @@ static void __exit f7188x_gpio_exit(void) } module_exit(f7188x_gpio_exit); -MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866"); +MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889A, F71889F and F81866"); MODULE_AUTHOR("Simon Guinot "); MODULE_LICENSE("GPL");