From patchwork Fri Apr 7 00:16:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 747996 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vzgCF2JTnz9s8P for ; Fri, 7 Apr 2017 10:18:01 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3vzgCF1JlGzDqKF for ; Fri, 7 Apr 2017 10:18:01 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3vzgBr0Pp0zDqHq for ; Fri, 7 Apr 2017 10:17:39 +1000 (AEST) Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v370Db5t011414 for ; Thu, 6 Apr 2017 20:17:29 -0400 Received: from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145]) by mx0a-001b2d01.pphosted.com with ESMTP id 29nwqdd6av-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 06 Apr 2017 20:17:28 -0400 Received: from localhost by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 7 Apr 2017 10:17:23 +1000 Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v370HEqw48824500 for ; Fri, 7 Apr 2017 10:17:22 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v370Gk09017035 for ; Fri, 7 Apr 2017 10:16:46 +1000 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v370GkpE016920; Fri, 7 Apr 2017 10:16:46 +1000 Received: from bran.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) by ozlabs.au.ibm.com (Postfix) with ESMTP id D20AFA0253; Fri, 7 Apr 2017 10:16:25 +1000 (AEST) Received: from gwshan.ozlabs.ibm.com (shangw.ozlabs.ibm.com [10.61.2.199]) by bran.ozlabs.ibm.com (Postfix) with ESMTP id C4986E3AC4; Fri, 7 Apr 2017 10:16:25 +1000 (AEST) Received: by gwshan.ozlabs.ibm.com (Postfix, from userid 1000) id BB245AC235E; Fri, 7 Apr 2017 10:16:25 +1000 (AEST) From: Gavin Shan To: skiboot@lists.ozlabs.org Date: Fri, 7 Apr 2017 10:16:17 +1000 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491524180-12644-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1491524180-12644-1-git-send-email-gwshan@linux.vnet.ibm.com> X-TM-AS-MML: disable x-cbid: 17040700-0008-0000-0000-0000011DE080 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17040700-0009-0000-0000-0000094A2384 Message-Id: <1491524180-12644-2-git-send-email-gwshan@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-04-06_20:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1704070001 Subject: [Skiboot] [PATCH 1/4] core/pci: Use cached vendor/device IDs in quirks X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The PCI device vendor/device IDs have been cached to pd->vdid, no need to pass them in pci_handle_quirk(). This also introduces two macros to extract vendor/device fields and they are useful afterwards. No logical changes introduced. Signed-off-by: Gavin Shan Acked-by: Benjamin Herrenschmidt --- core/pci-quirk.c | 9 +++------ core/pci.c | 2 +- include/pci-quirk.h | 5 +---- include/pci.h | 2 ++ 4 files changed, 7 insertions(+), 11 deletions(-) diff --git a/core/pci-quirk.c b/core/pci-quirk.c index 383d92c..0153bdb 100644 --- a/core/pci-quirk.c +++ b/core/pci-quirk.c @@ -70,17 +70,14 @@ static const struct pci_quirk quirk_table[] = { {NULL} }; -void pci_handle_quirk(struct phb *phb, - struct pci_device *pd, - uint16_t vendor_id, - uint16_t device_id) +void pci_handle_quirk(struct phb *phb, struct pci_device *pd) { const struct pci_quirk *quirks = quirk_table; while (quirks->vendor_id) { - if (vendor_id == quirks->vendor_id && + if (quirks->vendor_id == PCI_VENDOR_ID(pd->vdid) && (quirks->device_id == PCI_ANY_ID || - device_id == quirks->device_id)) + quirks->device_id == PCI_DEVICE_ID(pd->vdid))) quirks->fixup(phb, pd); quirks++; } diff --git a/core/pci.c b/core/pci.c index a8b4b69..a93239b 100644 --- a/core/pci.c +++ b/core/pci.c @@ -1450,7 +1450,7 @@ static void pci_add_one_device_node(struct phb *phb, if (intpin) dt_add_property_cells(np, "interrupts", intpin); - pci_handle_quirk(phb, pd, vdid & 0xffff, vdid >> 16); + pci_handle_quirk(phb, pd); /* XXX FIXME: Add a few missing ones such as * diff --git a/include/pci-quirk.h b/include/pci-quirk.h index c766973..1883248 100644 --- a/include/pci-quirk.h +++ b/include/pci-quirk.h @@ -27,9 +27,6 @@ struct pci_quirk { uint16_t device_id; }; -void pci_handle_quirk(struct phb *phb, - struct pci_device *pd, - uint16_t vendor_id, - uint16_t device_id); +void pci_handle_quirk(struct phb *phb, struct pci_device *pd); #endif /* __PCI_QUIRK_H */ diff --git a/include/pci.h b/include/pci.h index dc418a9..296fb8d 100644 --- a/include/pci.h +++ b/include/pci.h @@ -72,6 +72,8 @@ struct pci_device { uint32_t vdid; uint32_t sub_vdid; +#define PCI_VENDOR_ID(x) ((x) & 0xFFFF) +#define PCI_DEVICE_ID(x) ((x) >> 8) uint32_t class; uint64_t cap_list; struct {