From patchwork Thu Apr 6 16:56:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 747909 X-Patchwork-Delegate: cyrille.pitchen@atmel.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vzTdV0ssQz9ryk for ; Fri, 7 Apr 2017 03:06:38 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="IlPocC4Q"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8Uimdlz8IyHSVQGDRGHjI+9bIqpJdpKwJXwtXbClovo=; b=IlPocC4QzG+EMm nAc7vwkXDYqXNARVihMUqERjxwPWhXH7AYiud/eC9MhKVNxGt92gLC5wMZjbH8JqkEtdfLF0zWC9T s28lctkk6c2DxwSBsevi+wjpYCa5ZnKpaRTEne8MvLJ/++6+c6AjJMNTPXWX2sLBQ5xLab6OSV7as caKm9tb2ePEyRs8CAkKF7lr4dvPgVCvXDj6PzN4hZSuxeRtMh2CKL74eO81pS0Dv20N5KF3ybdS6u 015iqNIGl0YBtXauCOIDky/FHIPwzuv9HoVpJG/g0nhwiC+NlaOuwZ6zUGCjj4z6zBclg/JBR2YCc 05mv+nbOsqAgkN3CathQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cwArc-0003Ez-2f; Thu, 06 Apr 2017 17:06:28 +0000 Received: from 6.mo2.mail-out.ovh.net ([87.98.165.38]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cwAjW-0005Sg-2w for linux-mtd@lists.infradead.org; Thu, 06 Apr 2017 16:58:07 +0000 Received: from player731.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id D731E7A414 for ; Thu, 6 Apr 2017 18:57:43 +0200 (CEST) Received: from zorba.kaod.org (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player731.ha.ovh.net (Postfix) with ESMTPSA id 982DD420078; Thu, 6 Apr 2017 18:57:32 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: linux-mtd@lists.infradead.org Subject: [PATCH 04/10] mtd: spi-nor: aspeed: add support for SPI dual IO read mode Date: Thu, 6 Apr 2017 18:56:42 +0200 Message-Id: <1491497808-25487-5-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491497808-25487-1-git-send-email-clg@kaod.org> References: <1491497808-25487-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 8324622437562682291 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeliedrtdeggddutdejucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170406_095806_279490_F60B3EEA X-CRM114-Status: GOOD ( 11.86 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [87.98.165.38 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [87.98.165.38 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Boris Brezillon , Robert Lippert , Richard Weinberger , Marek Vasut , Robert Lippert , Joel Stanley , Cyrille Pitchen , Brian Norris , David Woodhouse , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Robert Lippert Implements support for the dual IO read mode on aspeed SMC/FMC controllers which uses both MISO and MOSI lines for data during a read to double the read bandwidth. Signed-off-by: Robert Lippert [clg: adapted to mainline driver ] Signed-off-by: Cédric Le Goater --- drivers/mtd/spi-nor/aspeed-smc.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c index 7dfa1ea0a787..b3c8cfe29765 100644 --- a/drivers/mtd/spi-nor/aspeed-smc.c +++ b/drivers/mtd/spi-nor/aspeed-smc.c @@ -512,6 +512,7 @@ static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from, int i; u8 dummy = 0xFF; int ret; + u32 ctl; if (aspeed_smc_dma_check(chip, from, len)) { ret = aspeed_smc_dma_start(chip, from, read_buf, len, 0); @@ -525,6 +526,13 @@ static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from, for (i = 0; i < chip->nor.read_dummy / 8; i++) aspeed_smc_write_to_ahb(chip->ahb_base, &dummy, sizeof(dummy)); + if (chip->nor.flash_read == SPI_NOR_DUAL) { + /* Switch to dual I/O mode for data cycle */ + ctl = readl(chip->ctl) & ~CONTROL_IO_MODE_MASK; + ctl |= CONTROL_IO_DUAL_DATA; + writel(ctl, chip->ctl); + } + aspeed_smc_read_from_ahb(read_buf, chip->ahb_base, len); aspeed_smc_stop_user(nor); out: @@ -751,6 +759,9 @@ static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip) case SPI_NOR_FAST: cmd = CONTROL_COMMAND_MODE_FREAD; break; + case SPI_NOR_DUAL: + cmd = CONTROL_COMMAND_MODE_FREAD | CONTROL_IO_DUAL_DATA; + break; default: dev_err(chip->nor.dev, "unsupported SPI read mode\n"); return -EINVAL; @@ -760,7 +771,7 @@ static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip) chip->nor.read_opcode << CONTROL_COMMAND_SHIFT | CONTROL_IO_DUMMY_SET(chip->nor.read_dummy / 8); - dev_dbg(controller->dev, "base control register: %08x\n", + dev_dbg(controller->dev, "read control register: %08x\n", chip->ctl_val[smc_read]); return 0; } @@ -830,12 +841,7 @@ static int aspeed_smc_setup_flash(struct aspeed_smc_controller *controller, if (ret) break; - /* - * TODO: Add support for SPI_NOR_QUAD and SPI_NOR_DUAL - * attach when board support is present as determined - * by of property. - */ - ret = spi_nor_scan(nor, NULL, SPI_NOR_NORMAL); + ret = spi_nor_scan(nor, NULL, SPI_NOR_DUAL); if (ret) break;