From patchwork Wed Dec 8 20:17:26 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kristoffer Ericson X-Patchwork-Id: 74776 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9E02BB70CD for ; Thu, 9 Dec 2010 07:22:18 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ABD9328101; Wed, 8 Dec 2010 21:22:14 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pkHsC+ur3lhl; Wed, 8 Dec 2010 21:22:14 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6AEBF28102; Wed, 8 Dec 2010 21:22:12 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2082128102 for ; Wed, 8 Dec 2010 21:22:10 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VGI61LP4UlFu for ; Wed, 8 Dec 2010 21:22:08 +0100 (CET) X-Greylist: delayed 315 seconds by postgrey-1.27 at theia; Wed, 08 Dec 2010 21:22:06 CET X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ew0-f46.google.com (mail-ew0-f46.google.com [209.85.215.46]) by theia.denx.de (Postfix) with ESMTP id 0D6D028101 for ; Wed, 8 Dec 2010 21:22:06 +0100 (CET) Received: by ewy5 with SMTP id 5so1255964ewy.33 for ; Wed, 08 Dec 2010 12:22:06 -0800 (PST) Received: by 10.213.28.203 with SMTP id n11mr60814ebc.48.1291839410787; Wed, 08 Dec 2010 12:16:50 -0800 (PST) Received: from localhost (c-1cdce555.010-30-6c6b7012.cust.bredbandsbolaget.se [85.229.220.28]) by mx.google.com with ESMTPS id x54sm694779eeh.11.2010.12.08.12.16.49 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 08 Dec 2010 12:16:49 -0800 (PST) Date: Wed, 8 Dec 2010 21:17:26 +0100 From: Kristoffer Ericson To: wd@denx.de Message-ID: <20101208201726.GA901@boggieman.bredbandsbolaget.se> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Cc: u-boot@lists.denx.de Subject: [U-Boot] Elf relocation issues with jornada X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list Reply-To: Kristoffer Ericson List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Greetings, Im obviously doing something wrong. This is what I get at bootup: U-Boot 2010.12-rc2-00029-g49733aa-dirty (Dec 08 2010 - 21:04:16) DRAM: 361.9 MiB The DRAM is pulling some random number each time, so Ive gotten 0,0,146.2,361.8.Patch attached. Best wishes Kristoffer Ericson diff --git a/include/configs/jornada.h b/include/configs/jornada.h index 41b09aa..a8efb02 100644 --- a/include/configs/jornada.h +++ b/include/configs/jornada.h @@ -29,7 +29,7 @@ #define CONFIG_JORNADA700 1 /* on an HP Jornada 700 series */ #define CONFIG_SYS_FLASH_PROTECTION 1 -#define CONFIG_SYS_TEXT_BASE 0xC1F00000 +#define CONFIG_SYS_TEXT_BASE 0x0 /* we will never enable dcache, because we have to setup MMU first */ #define CONFIG_SYS_NO_DCACHE @@ -71,7 +71,6 @@ #define CONFIG_BOOTARGS "root=/dev/hda1 console=ttySA0,19200n8 console=tty1" #define CONFIG_BOOTCOMMAND "run boot_kernel" #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ -#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* * Miscellaneous configurable options @@ -128,15 +127,19 @@ */ #define CONFIG_NR_DRAM_BANKS 2 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_INIT_SP_ADDR 0x0 #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_2 0xc4000000 /* SDRAM Bank #2 */ #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ +#define CONFIG_NR_DRAM_BANKS 2 +#define CONFIG_SYS_DRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_DRAM_SIZE 0x04000000 + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 0x2048) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) + #define CONFIG_CMD_MTDPARTS #define CONFIG_MTD_DEVICE #define CONFIG_FLASH_CFI_MTD