gcc/

	* config/arm/arm.c (arm_preferred_rename_class): Implement targethook
	PREFERRED_RENAME_CLASS.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index afca3c6..1b27f00 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -246,6 +246,7 @@ static bool arm_builtin_support_vector_misalignment (enum machine_mode mode,
 						     const_tree type,
 						     int misalignment,
 						     bool is_packed);
+static reg_class_t arm_preferred_rename_class (reg_class_t class)
 
 
 /* Table of machine attributes.  */
@@ -578,6 +579,10 @@ static const struct default_options arm_option_optimization_table[] =
 #define TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT \
   arm_builtin_support_vector_misalignment
 
+#undef TARGET_PREFERRED_RENAME_CLASS
+#define TARGET_PREFERRED_RENAME_CLASS \
+  arm_preferred_rename_class
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Obstack for minipool constant handling.  */
@@ -23264,4 +23269,16 @@ arm_builtin_support_vector_misalignment (enum machine_mode mode,
 						      is_packed);
 }
 
+static reg_class_t
+arm_preferred_rename_class (reg_class_t class)
+{
+  /* thumb-2 instructions using LO_REGS may be smaller than instructions
+     using GENERIC_REGS.  During register rename pass, we prefer LO_REGS,
+     and code size can be reduced.  */
+  if (TARGET_THUMB2 && class == GENERAL_REGS)
+    return LO_REGS;
+  else
+    return default_preferred_rename_class (class);
+}
+
 #include "gt-arm.h"