Message ID | 1491368128-6909-1-git-send-email-santan.kumar@nxp.com |
---|---|
State | Deferred |
Headers | show |
it is superseded. I have sent another patch with subject changed. > -----Original Message----- > From: Santan Kumar [mailto:santan.kumar@nxp.com] > Sent: Wednesday, April 5, 2017 10:25 AM > To: u-boot@lists.denx.de; york sun <york.sun@nxp.com> > Cc: Santan Kumar <santan.kumar@nxp.com>; Priyanka Jain > <priyanka.jain@nxp.com> > Subject: [PATCH] armv8: ls2081a: Add serdes2 protocol 0x51 support > > Signed-off-by: Santan Kumar <santan.kumar@nxp.com> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > index ab83e85..4db3c76 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c > @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = { > SATA2 } }, > {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, > SATA2 } }, > + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, > {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } }, > {} > }; > -- > 1.9.1
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c index ab83e85..4db3c76 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = { SATA2 } }, {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, SATA2 } }, + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } }, {} };