From patchwork Mon Apr 3 16:05:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 746560 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vxcQv4SzJz9s80 for ; Tue, 4 Apr 2017 02:05:59 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="C6psHDp+"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752532AbdDCQF5 (ORCPT ); Mon, 3 Apr 2017 12:05:57 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:35349 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753382AbdDCQF4 (ORCPT ); Mon, 3 Apr 2017 12:05:56 -0400 Received: by mail-wr0-f194.google.com with SMTP id p52so34884821wrc.2; Mon, 03 Apr 2017 09:05:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tUEZtzEZ3IpfpDqcgpWsHwKgP2oBjiIoQHe3drdJ3N0=; b=C6psHDp+Hk4n2x8mXCqBJ2L0Ci/0mA08GiMs0B2/6z7eoYTbX3gR5tTK+CCDbUrHoR oGbfnxvdELO1BtOFSB34rdZ7puohjEeyz4r0+kUKzRALOJtndkM+ucc0TgPdtPckPBjU pBfxHifQ/iKtqfagDdSlTGGwwAhtNPQqwUEo+s4AP0D/WSJKT68b32GcnOMnFKtKCuDM khnFQ/uHvmWc28jXb8BTbxDVpEQSOgOC7nWvcynyOAMm8tYkNycWYrv+H22jdnRgxkYL IwHx0EBSScaaoUuc82rNXP8jJUuKK16dGcS9iL26ainVu7TWqMWtKxyCJCUdqB+1SCfN iHLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tUEZtzEZ3IpfpDqcgpWsHwKgP2oBjiIoQHe3drdJ3N0=; b=Ga9mL1V4VMb1eCETQz06fexgANy3QgLZoWyi26l4pE4aig1RDDnfXaXeyoLalOuV9M vnA8hOSCt04Nf6UBFf1AzMH52tcw7n5UYo2zgxjAYjdbfg/hZFB3Exq95JSYEtsmROnI m11Kqjm0/kFwB9mdgRnZdcILIP6eLKLp/uTgTKXOsUre7KSqiecyLJCk7APbP/WS611I KayY4B+q6ABhbcGdE8MH0QyZIlkOimkJIeGrHnFYzsrqlVp978UcI7B9FVUBjftyvn57 ErMXAMKsy2IrxtT+AnC+H6Cp5FcexPCwcgZ2qkKGAJsAekjrShcTPQs1ljb6M+fLe4it IVmA== X-Gm-Message-State: AFeK/H2V5E9YmD9SvGrVttxCUNU8C25Xr8xjjSBBqFp+8WCsvb3rq6gl4YuX6t3LAko6rQ== X-Received: by 10.28.7.144 with SMTP id 138mr10751598wmh.125.1491235549523; Mon, 03 Apr 2017 09:05:49 -0700 (PDT) Received: from localhost (port-24830.pppoe.wtnet.de. [46.59.158.181]) by smtp.gmail.com with ESMTPSA id y190sm14857745wmy.15.2017.04.03.09.05.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Apr 2017 09:05:48 -0700 (PDT) From: Thierry Reding To: Linus Walleij Cc: Alexandre Courbot , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 11/12] gpio: Move irq_base to struct gpio_irq_chip Date: Mon, 3 Apr 2017 18:05:31 +0200 Message-Id: <20170403160532.20282-12-thierry.reding@gmail.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170403160532.20282-1-thierry.reding@gmail.com> References: <20170403160532.20282-1-thierry.reding@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding --- drivers/gpio/gpio-mockup.c | 6 +++--- drivers/gpio/gpiolib.c | 2 +- include/linux/gpio/driver.h | 5 +---- 3 files changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-mockup.c b/drivers/gpio/gpio-mockup.c index 04008fadabef..f4179f7420a3 100644 --- a/drivers/gpio/gpio-mockup.c +++ b/drivers/gpio/gpio-mockup.c @@ -139,7 +139,7 @@ static int gpio_mockup_name_lines(struct device *dev, static int gpio_mockup_to_irq(struct gpio_chip *chip, unsigned int offset) { - return chip->irq_base + offset; + return chip->irq.first + offset; } /* @@ -173,7 +173,7 @@ static int gpio_mockup_irqchip_setup(struct device *dev, if (irq_base < 0) return irq_base; - gc->irq_base = irq_base; + gc->irq.first = irq_base; gc->irq.chip = &gpio_mockup_irqchip; for (i = 0; i < gc->ngpio; i++) { @@ -217,7 +217,7 @@ static ssize_t gpio_mockup_event_write(struct file *file, return -EINVAL; gpiod_set_value_cansleep(desc, val); - priv->chip->irq_ctx.irq = gc->irq_base + priv->offset; + priv->chip->irq_ctx.irq = gc->irq.first + priv->offset; irq_work_queue(&priv->chip->irq_ctx.work); return size; diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 3b251d5c0e1a..55e59d79bfd3 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1955,7 +1955,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, * Store the base into the gpiochip to be used when * unmapping the irqs. */ - gpiochip->irq_base = irq_base; + gpiochip->irq.first = irq_base; irq_base_set = true; } } diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 91aa808052f1..96e7aca74ed1 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -24,7 +24,7 @@ struct module; * struct gpio_irq_chip - GPIO interrupt controller * @chip: GPIO IRQ chip implementation, provided by GPIO driver * @first: if not dynamically assigned, the base (first) IRQ to allocate GPIO - * chip IRQs from + * chip IRQs from (deprecated) * @domain: interrupt translation domain; responsible for mapping * between GPIO hwirq number and linux irq number * @domain_ops: table of interrupt domain operations for this IRQ chip @@ -125,7 +125,6 @@ struct gpio_irq_chip { * safely. * @bgpio_dir: shadowed direction register for generic GPIO to clear/set * direction safely. - * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated) * * A gpio_chip can help platforms abstract various sources of GPIOs so * they can all be accessed through a common programing interface. @@ -192,8 +191,6 @@ struct gpio_chip { * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib * to handle IRQs for most practical cases. */ - unsigned int irq_base; - struct gpio_irq_chip irq; #endif