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Add Zaius device tree entry for 12V Delta Power Brick.

Message ID CAPozSNqWfu9_+uY7Hs4ALQknS2GPnPpp8xe7eD1ShmuNjEEzoQ@mail.gmail.com
State Superseded, archived
Headers show

Commit Message

Peter Hanson March 22, 2017, 11:07 p.m. UTC
Signed-off-by: Peter Hanson <peterh@google.com>
---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Peter Hanson March 22, 2017, 11:10 p.m. UTC | #1
Oops that ate my tabs, sorry. Will repost after I defeat my email client.
Xo Wang March 22, 2017, 11:40 p.m. UTC | #2
Hi Peter,

Please include the commit message (first line = email subject)
prefixes used in previous changes to the dts file.

ex.: "ARM: dts: aspeed: zaius: Enable NC-SI mux"

On Wed, Mar 22, 2017 at 4:07 PM, Peter Hanson <peterh@google.com> wrote:
> Signed-off-by: Peter Hanson <peterh@google.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> index 3bd70ed810af..4fd27617bb3a 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> @@ -269,7 +269,13 @@
>   /* Master selector PCA9541A @70h (other master: CPU0)
>   *   LM5066I PMBUS @10h
>   */
> - /* 12V SMPS Q54SH12050NNDH @61h */
> +
> + /* 12V SMPS Q54SJ12050 @61h */
> + q54sj12050@61 {
> + compatible = "delta,dps800";
> + reg = <0x61>;
> + };
> +
>   /* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
>   /* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
>   /* CPU0 VR ISL68137 0.8V PMBUS @60h */
> --
> 2.12.1.500.gab5fba24ee-goog

cheers
xo
diff mbox

Patch

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 3bd70ed810af..4fd27617bb3a 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -269,7 +269,13 @@ 
  /* Master selector PCA9541A @70h (other master: CPU0)
  *   LM5066I PMBUS @10h
  */
- /* 12V SMPS Q54SH12050NNDH @61h */
+
+ /* 12V SMPS Q54SJ12050 @61h */
+ q54sj12050@61 {
+ compatible = "delta,dps800";
+ reg = <0x61>;
+ };
+
  /* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
  /* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
  /* CPU0 VR ISL68137 0.8V PMBUS @60h */