===================================================================
@@ -585,7 +585,7 @@
(set_attr "neg_pool_range" "*,250")]
)
-(define_insn "thumb2_zero_extendqisi2_v6"
+(define_insn "*thumb2_zero_extendqisi2_v6"
[(set (match_operand:SI 0 "s_register_operand" "=r,r")
(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
"TARGET_THUMB2 && arm_arch6"
@@ -1118,3 +1118,17 @@
"
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
")
+
+(define_split
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (and:SI (match_operand:SI 1 "s_register_operand" "")
+ (match_operand:SI 2 "const_int_operand" "")))]
+ "TARGET_THUMB2 && arm_arch6 && INTVAL (operands[2]) == 255
+ && (optimize_size || !arm_tune_cortex_a9)"
+ [(set (match_dup 0)
+ (zero_extend:SI (match_dup 1)))]
+ "
+ operands[1] = convert_to_mode (QImode, operands[1], 1);
+ "
+)
+
===================================================================
@@ -2015,17 +2015,9 @@
{
if (GET_CODE (operands[2]) == CONST_INT)
{
- if (INTVAL (operands[2]) == 255 && arm_arch6)
- {
- operands[1] = convert_to_mode (QImode, operands[1], 1);
- emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0],
- operands[1]));
- }
- else
- arm_split_constant (AND, SImode, NULL_RTX,
- INTVAL (operands[2]), operands[0],
- operands[1],
- optimize && can_create_pseudo_p ());
+ arm_split_constant (AND, SImode, NULL_RTX,
+ INTVAL (operands[2]), operands[0],
+ operands[1], optimize && can_create_pseudo_p ());
DONE;
}
===================================================================
@@ -5,5 +5,5 @@
int tp(int x, int y)
{
- return (x & 0xff) - (y & 0xffff);
+ return ((x+3) & 0xff) - (y & 0xffff);
}