@@ -13,6 +13,9 @@ config ARC
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select ARCH_EARLY_INIT_R
+ select CLK
+ select TIMER
+ select ARC_TIMER
config ARM
bool "ARM architecture"
@@ -18,7 +18,6 @@ obj-y += memcmp.o
obj-y += memcpy-700.o
obj-y += memset.o
obj-y += reset.o
-obj-y += timer.o
obj-y += ints_low.o
obj-y += init_helpers.o
deleted file mode 100644
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm/arcregs.h>
-
-#define NH_MODE (1 << 1) /* Disable timer if CPU is halted */
-
-int timer_init(void)
-{
- write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
- /* Set max value for counter/timer */
- write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
- /* Set initial count value and restart counter/timer */
- write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
- return 0;
-}
-
-unsigned long timer_read_counter(void)
-{
- return read_aux_reg(ARC_AUX_TIMER0_CNT);
-}
@@ -19,7 +19,6 @@ CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
-CONFIG_CLK=y
CONFIG_SYS_I2C_DW=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
@@ -18,7 +18,6 @@ CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
-CONFIG_CLK=y
CONFIG_SYS_I2C_DW=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
@@ -11,8 +11,6 @@
/*
* CPU configuration
*/
-#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-
#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
#define ARC_APB_PERIPHERAL_BASE 0xF0000000
#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
@@ -10,11 +10,6 @@
#include <linux/sizes.h>
/*
- * CPU configuration
- */
-#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-
-/*
* Memory configuration
*/
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
@@ -10,11 +10,6 @@
#include <linux/sizes.h>
/*
- * CPU configuration
- */
-#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-
-/*
* Memory configuration
*/
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE