| Message ID | 20170320114036.21475-6-heiko@sntech.de |
|---|---|
| State | Accepted |
| Commit | f4f57c58b5899efbad2f0d9c9dd8d44b0619395e |
| Delegated to: | Simon Glass |
| Headers | show |
On 20 March 2017 at 05:40, Heiko Stuebner <heiko@sntech.de> wrote: > The armclk starts in slow mode (24MHz) on the rk3188, which results in U-Boot > startup taking a lot of time (U-Boot itself, but also the rc4 decoding done > in the bootrom). > > With default pmic settings we can always reach a safe frequency of 600MHz > which is also the frequency the proprietary loader left the armclk at, > without needing access to the systems pmic. > > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > --- > arch/arm/mach-rockchip/rk3188-board-spl.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) Acked-by: Simon Glass <sjg@chromium.org>
On 23 March 2017 at 21:28, Simon Glass <sjg@chromium.org> wrote: > On 20 March 2017 at 05:40, Heiko Stuebner <heiko@sntech.de> wrote: >> The armclk starts in slow mode (24MHz) on the rk3188, which results in U-Boot >> startup taking a lot of time (U-Boot itself, but also the rc4 decoding done >> in the bootrom). >> >> With default pmic settings we can always reach a safe frequency of 600MHz >> which is also the frequency the proprietary loader left the armclk at, >> without needing access to the systems pmic. >> >> Signed-off-by: Heiko Stuebner <heiko@sntech.de> >> --- >> arch/arm/mach-rockchip/rk3188-board-spl.c | 24 ++++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) > > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot-rockchip, thanks!
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index af4623fdb0..affd959f86 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <clk.h> #include <common.h> #include <debug_uart.h> #include <dm.h> @@ -76,6 +77,27 @@ u32 spl_boot_mode(const u32 boot_device) return MMCSD_MODE_RAW; } +static int setup_arm_clock(void) +{ + struct udevice *dev; + struct clk clk; + int ret; + + ret = rockchip_get_clk(&dev); + if (ret) + return ret; + + clk.id = CLK_ARM; + ret = clk_request(dev, &clk); + if (ret < 0) + return ret; + + ret = clk_set_rate(&clk, 600000000); + + clk_free(&clk); + return ret; +} + void board_init_f(ulong dummy) { struct udevice *pinctrl, *dev; @@ -144,6 +166,8 @@ void board_init_f(ulong dummy) return; } + setup_arm_clock(); + #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif
The armclk starts in slow mode (24MHz) on the rk3188, which results in U-Boot startup taking a lot of time (U-Boot itself, but also the rc4 decoding done in the bootrom). With default pmic settings we can always reach a safe frequency of 600MHz which is also the frequency the proprietary loader left the armclk at, without needing access to the systems pmic. Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- arch/arm/mach-rockchip/rk3188-board-spl.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)