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RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.97
@@ -392,11 +392,11 @@
<ul>
<li>
A number of AArch64-specific options have been added. The most
- important ones are summarised in this section but for usage
- instructions please refer to the documentation.
+ important ones are summarised in this section; for more detailed
+ information please refer to the documentation.
</li>
<li>
- The new command-line options <code>-march=native</code>,
+ The command-line options <code>-march=native</code>,
<code>-mcpu=native</code> and <code>-mtune=native</code> are now
available on native AArch64 GNU/Linux systems. Specifying
these options causes GCC to auto-detect the host CPU and
@@ -470,14 +470,14 @@
</li>
<li>
Improvements in the generation of conditional branches and literal
- pools were made to allow the compiler to compile functions of a large
+ pools allow the compiler to compile functions of a large
size. Constant pools are now placed into separate rodata sections.
- The new option <code>-mpc-relative-literal-loads</code> is
- introduced to generate per-function literal pools, limiting the maximum
+ The new option <code>-mpc-relative-literal-loads</code>
+ generates per-function literal pools, limiting the maximum
size of functions to 1MiB.
</li>
<li>
- Several correctness issues with generation of Advanced SIMD instructions
+ Several correctness issues generating Advanced SIMD instructions
for big-endian targets have been fixed resulting in improved code
generation for ACLE intrinsics with <code>-mbig-endian</code>.
</li>