From patchwork Fri Mar 17 12:43:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bedarkar X-Patchwork-Id: 740306 X-Patchwork-Delegate: cyrille.pitchen@atmel.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vl4pr50NTz9s2Q for ; Fri, 17 Mar 2017 23:46:44 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="J1sFruTS"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HvGozgdo+GbzbM+o27XcdzEwfgvGvGR4ZZE25HEvpOA=; b=J1sFruTSlEuOVC cpG/rpBKRhEBIlpoR9faqvC0/rkT4NKQsKQN7F4O9eW9aCpAC1nS2+2ouQGK8IVxirGcXM3vbR7JI tpHX+HqU8qpgqYSkeLLU4QYCcXzfxEyjYKC4N16rDXfFpBCy5xtChlzqz98R7z6+S5xjMzgnMUvTY UwDtX9qz3y0c0mi7tKSgO2lLUmbbYmLHXpt0AS6E9VQRHWdJxXNaofmFBDnJcoFgomScVG8b+57zl L9oAdslLdggXvKKk29OqIrqGhv9AbEWna4mOCSbXC5zKSY4pyTQuT15/IkZE3r6YdrL4w+U1fXTKY qKswt/4M/x0eGpG8xeMQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1corHA-0005DG-Q6; Fri, 17 Mar 2017 12:46:36 +0000 Received: from mailapp01.imgtec.com ([195.59.15.196]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1corGd-0004KL-Pn for linux-mtd@lists.infradead.org; Fri, 17 Mar 2017 12:46:07 +0000 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 4455F5AA38B32; Fri, 17 Mar 2017 12:45:41 +0000 (GMT) Received: from pudesk287-linux.pu.imgtec.org (192.168.91.23) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.294.0; Fri, 17 Mar 2017 12:45:44 +0000 From: Rahul Bedarkar To: , Subject: [RFC 4/6] mtd: m25p80: implement read_xfer and write_xfer Date: Fri, 17 Mar 2017 18:13:54 +0530 Message-ID: <1489754636-21461-5-git-send-email-rahul.bedarkar@imgtec.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1489754636-21461-1-git-send-email-rahul.bedarkar@imgtec.com> References: <1489754636-21461-1-git-send-email-rahul.bedarkar@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.91.23] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170317_054604_537018_DEA8A62A X-CRM114-Status: GOOD ( 10.18 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [195.59.15.196 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Boris Brezillon , Richard Weinberger , Marek Vasut , Rahul Bedarkar , Cyrille Pitchen , Brian Norris , David Woodhouse Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Implement read_xfer and write_xfer interfaces provided by SPI-NOR. These will be used in upcoming OTP support in SPI-NOR to read/write OTP area. Signed-off-by: Rahul Bedarkar Cc: David Woodhouse Cc: Brian Norris Cc: Boris Brezillon Cc: Marek Vasut Cc: Richard Weinberger Cc: Cyrille Pitchen --- drivers/mtd/devices/m25p80.c | 79 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 8368249..a3ba907 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -186,6 +186,83 @@ static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len, return ret; } +static ssize_t m25p80_read_xfer(struct spi_nor *nor, + struct spi_nor_xfer_cfg *cfg, + u8 *buf, size_t len) +{ + struct m25p *flash = nor->priv; + struct spi_device *spi = flash->spi; + struct spi_transfer t[2] = {}; + struct spi_message m; + unsigned int dummy = cfg->dummy_cycles; + ssize_t ret; + + /* convert the dummy cycles to the number of bytes */ + dummy /= 8; + + spi_message_init(&m); + + flash->command[0] = cfg->cmd; + m25p_addr2cmd(cfg->addr, cfg->addr_width, flash->command); + + t[0].tx_buf = flash->command; + t[0].len = m25p_cmdsz(cfg->addr_width) + dummy; + spi_message_add_tail(&t[0], &m); + + t[1].rx_buf = buf; + t[1].rx_nbits = m25p80_rx_nbits(cfg->mode); + t[1].len = len; + spi_message_add_tail(&t[1], &m); + + ret = spi_sync(spi, &m); + if (ret) + return ret; + + ret = m.actual_length - m25p_cmdsz(cfg->addr_width) - dummy; + if (ret < 0) + return -EIO; + return ret; +} + +static ssize_t m25p80_write_xfer(struct spi_nor *nor, + struct spi_nor_xfer_cfg *cfg, + u8 *buf, size_t len) +{ + struct m25p *flash = nor->priv; + struct spi_device *spi = flash->spi; + struct spi_transfer t[2] = {}; + struct spi_message m; + unsigned int dummy = cfg->dummy_cycles; + ssize_t ret; + + /* convert the dummy cycles to the number of bytes */ + dummy /= 8; + + spi_message_init(&m); + + flash->command[0] = cfg->cmd; + m25p_addr2cmd(cfg->addr, cfg->addr_width, flash->command); + + t[0].tx_buf = flash->command; + t[0].len = m25p_cmdsz(cfg->addr_width) + dummy; + spi_message_add_tail(&t[0], &m); + + if (len) { + t[1].tx_buf = buf; + t[1].len = len; + spi_message_add_tail(&t[1], &m); + } + + ret = spi_sync(spi, &m); + if (ret) + return ret; + + ret = m.actual_length - m25p_cmdsz(cfg->addr_width) - dummy; + if (ret < 0) + return -EIO; + return ret; +} + /* * board specific setup should have ensured the SPI clock used here * matches what the READ command supports, at least until this driver @@ -213,6 +290,8 @@ static int m25p_probe(struct spi_device *spi) nor->write = m25p80_write; nor->write_reg = m25p80_write_reg; nor->read_reg = m25p80_read_reg; + nor->read_xfer = m25p80_read_xfer; + nor->write_xfer = m25p80_write_xfer; nor->dev = &spi->dev; spi_nor_set_flash_node(nor, spi->dev.of_node);