From patchwork Fri Mar 17 09:58:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: M'boumba Cedric Madianga X-Patchwork-Id: 740212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vl1632TGZz9s1h for ; Fri, 17 Mar 2017 20:59:39 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Hz9ynF0q"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751505AbdCQJ7h (ORCPT ); Fri, 17 Mar 2017 05:59:37 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:32912 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751217AbdCQJ7f (ORCPT ); Fri, 17 Mar 2017 05:59:35 -0400 Received: by mail-wm0-f66.google.com with SMTP id n11so2383602wma.0; Fri, 17 Mar 2017 02:59:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=84DwKRqJKIc9dXaRpSyHwwD5CW1a7Owz1ljZisDMLXM=; b=Hz9ynF0qDchGan/tVTc9Om9/6FgNHOLXpuV8f5lasf2iHU1OQFZvRx1rsW11JWd0e6 Dl+5sPPhBJkw2Xc9lbrhViVGETNqZT9emX5L67MKPBHJTxs6fDfi//FMieOmhhNIAIYC 1/O1eo0KUOzrhVRzWRseE2BJogtzKeNlDehmNHTPVMC5RKTfhAmRMUCKY/HCD1nte8xm RDQgtTlil7FEzZtx0HWBuZkKez26oaBewiUK7hXPTppTC/9JENKtL9TQUY6bC9ig4fwh Lb6rFVPUo1wTNlQBLdeq9NY9kBmQNr1CcJGPPVyVWdio2zsa6ivxy+jloblOtIEHzX2P ZboA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=84DwKRqJKIc9dXaRpSyHwwD5CW1a7Owz1ljZisDMLXM=; b=hHhIkqohjkJHW24zZSf7ePvg+objJIuoWAaudHDB/tvki46Q1GLwAQm0RWI5ug9swk JWYMHxGeoYUBIKbY2/8g9D6Vt+zaFhy+QaDDkcNTkZlvR1Lo41mUxSgJ5dgOmjo09YI3 jORqgtNfLrDo38gcXRaJhdU7lTn/QjD3f4rf4wyYKk4c2m3CyZI4YuRRQpdKKQ2MLrfb ot1WjKpMqCOGa7F3blgwSn75yjeXecYK4RQz6wwBvr+HpIHYHp+PrYoknX+htIIXRJO1 UyvhGAFiY9zW9yrRZor6sujkhfNcABGKUZ3/f2zsSswfYLv+i6DdpQjcuFnEbKWnYVq0 BDBQ== X-Gm-Message-State: AFeK/H24KSFIu/ifaIED8WU8cAs2adMx6d9YbC3Siymt/8qkf7osZeAN+ZqkwXVqOEx7Eg== X-Received: by 10.28.69.202 with SMTP id l71mr2053957wmi.68.1489744752773; Fri, 17 Mar 2017 02:59:12 -0700 (PDT) Received: from lmenx29w.st.com. ([37.165.103.73]) by smtp.gmail.com with ESMTPSA id o52sm9356959wrb.51.2017.03.17.02.59.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Mar 2017 02:59:11 -0700 (PDT) From: M'boumba Cedric Madianga To: wsa@the-dreams.de, robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, linus.walleij@linaro.org, pierre-yves.mordret@st.com, linux@armlinux.org.uk, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: M'boumba Cedric Madianga Subject: [PATCH 2/5] i2c: i2c-stm32f4: use generic definition of speed enum Date: Fri, 17 Mar 2017 10:58:55 +0100 Message-Id: <1489744738-21632-3-git-send-email-cedric.madianga@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1489744738-21632-1-git-send-email-cedric.madianga@gmail.com> References: <1489744738-21632-1-git-send-email-cedric.madianga@gmail.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org This patch uses a more generic definition of speed enum for i2c-stm32f4 driver. Signed-off-by: M'boumba Cedric Madianga Reviewed-by: Ludovic BARRE --- drivers/i2c/busses/i2c-stm32.h | 20 ++++++++++++++++++++ drivers/i2c/busses/i2c-stm32f4.c | 18 +++++++----------- 2 files changed, 27 insertions(+), 11 deletions(-) create mode 100644 drivers/i2c/busses/i2c-stm32.h diff --git a/drivers/i2c/busses/i2c-stm32.h b/drivers/i2c/busses/i2c-stm32.h new file mode 100644 index 0000000..dab5176 --- /dev/null +++ b/drivers/i2c/busses/i2c-stm32.h @@ -0,0 +1,20 @@ +/* + * i2c-stm32.h + * + * Copyright (C) M'boumba Cedric Madianga 2017 + * Author: M'boumba Cedric Madianga + * + * License terms: GNU General Public License (GPL), version 2 + */ + +#ifndef _I2C_STM32_H +#define _I2C_STM32_H + +enum stm32_i2c_speed { + STM32_I2C_SPEED_STANDARD, /* 100 kHz */ + STM32_I2C_SPEED_FAST, /* 400 kHz */ + STM32_I2C_SPEED_FAST_PLUS, /* 1 MHz */ + STM32_I2C_SPEED_END, +}; + +#endif /* _I2C_STM32_H */ diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c index f9dd7e8..b81557d 100644 --- a/drivers/i2c/busses/i2c-stm32f4.c +++ b/drivers/i2c/busses/i2c-stm32f4.c @@ -27,6 +27,8 @@ #include #include +#include "i2c-stm32.h" + /* STM32F4 I2C offset registers */ #define STM32F4_I2C_CR1 0x00 #define STM32F4_I2C_CR2 0x04 @@ -90,12 +92,6 @@ #define STM32F4_I2C_MAX_FREQ 46U #define HZ_TO_MHZ 1000000 -enum stm32f4_i2c_speed { - STM32F4_I2C_SPEED_STANDARD, /* 100 kHz */ - STM32F4_I2C_SPEED_FAST, /* 400 kHz */ - STM32F4_I2C_SPEED_END, -}; - /** * struct stm32f4_i2c_msg - client specific data * @addr: 8-bit slave addr, including r/w bit @@ -159,7 +155,7 @@ static int stm32f4_i2c_set_periph_clk_freq(struct stm32f4_i2c_dev *i2c_dev) i2c_dev->parent_rate = clk_get_rate(i2c_dev->clk); freq = DIV_ROUND_UP(i2c_dev->parent_rate, HZ_TO_MHZ); - if (i2c_dev->speed == STM32F4_I2C_SPEED_STANDARD) { + if (i2c_dev->speed == STM32_I2C_SPEED_STANDARD) { /* * To reach 100 kHz, the parent clk frequency should be between * a minimum value of 2 MHz and a maximum value of 46 MHz due @@ -216,7 +212,7 @@ static void stm32f4_i2c_set_rise_time(struct stm32f4_i2c_dev *i2c_dev) * is not higher than 46 MHz . As a result trise is at most 4 bits wide * and so fits into the TRISE bits [5:0]. */ - if (i2c_dev->speed == STM32F4_I2C_SPEED_STANDARD) + if (i2c_dev->speed == STM32_I2C_SPEED_STANDARD) trise = freq + 1; else trise = freq * 3 / 10 + 1; @@ -230,7 +226,7 @@ static void stm32f4_i2c_set_speed_mode(struct stm32f4_i2c_dev *i2c_dev) u32 val; u32 ccr = 0; - if (i2c_dev->speed == STM32F4_I2C_SPEED_STANDARD) { + if (i2c_dev->speed == STM32_I2C_SPEED_STANDARD) { /* * In standard mode: * t_scl_high = t_scl_low = CCR * I2C parent clk period @@ -808,10 +804,10 @@ static int stm32f4_i2c_probe(struct platform_device *pdev) udelay(2); reset_control_deassert(rst); - i2c_dev->speed = STM32F4_I2C_SPEED_STANDARD; + i2c_dev->speed = STM32_I2C_SPEED_STANDARD; ret = of_property_read_u32(np, "clock-frequency", &clk_rate); if (!ret && clk_rate >= 400000) - i2c_dev->speed = STM32F4_I2C_SPEED_FAST; + i2c_dev->speed = STM32_I2C_SPEED_FAST; i2c_dev->dev = &pdev->dev;