[U-Boot,09/22] x86: acpi: Add wake up assembly stub

Submitted by Bin Meng on March 16, 2017, 2:26 p.m.

Details

Message ID 1489674408-17498-10-git-send-email-bmeng.cn@gmail.com
State New
Delegated to: Bin Meng
Headers show

Commit Message

Bin Meng March 16, 2017, 2:26 p.m.
This adds a wake up stub before jumping to OS wake up vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/cpu/Makefile          |  1 +
 arch/x86/cpu/wakeup.S          | 79 ++++++++++++++++++++++++++++++++++++++++++
 arch/x86/include/asm/acpi_s3.h |  9 +++++
 3 files changed, 89 insertions(+)
 create mode 100644 arch/x86/cpu/wakeup.S

Comments

Simon Glass March 21, 2017, 8:06 p.m.
Hi Bin,

On 16 March 2017 at 08:26, Bin Meng <bmeng.cn@gmail.com> wrote:
> This adds a wake up stub before jumping to OS wake up vector.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/cpu/Makefile          |  1 +
>  arch/x86/cpu/wakeup.S          | 79 ++++++++++++++++++++++++++++++++++++++++++
>  arch/x86/include/asm/acpi_s3.h |  9 +++++
>  3 files changed, 89 insertions(+)
>  create mode 100644 arch/x86/cpu/wakeup.S

Reviewed-by: Simon Glass <sjg@chromium.org>

nits below.

>
> diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
> index 92a9023..e1c84ce 100644
> --- a/arch/x86/cpu/Makefile
> +++ b/arch/x86/cpu/Makefile
> @@ -45,6 +45,7 @@ ifndef CONFIG_$(SPL_)X86_64
>  obj-$(CONFIG_SMP) += sipi_vector.o
>  endif
>  obj-y += turbo.o
> +obj-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.o
>
>  ifeq ($(CONFIG_$(SPL_)X86_64),y)
>  obj-y += x86_64/
> diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S
> new file mode 100644
> index 0000000..97b1c21
> --- /dev/null
> +++ b/arch/x86/cpu/wakeup.S
> @@ -0,0 +1,79 @@
> +/*
> + * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
> + *
> + * From coreboot src/arch/x86/wakeup.S
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#include <asm/acpi_s3.h>
> +#include <asm/processor.h>
> +#include <asm/processor-flags.h>
> +
> +#define RELOCATED(x)   (x - __wakeup + WAKEUP_BASE)

How about brackets around the second x

> +
> +#define CODE_SEG       (X86_GDT_ENTRY_16BIT_CS * X86_GDT_ENTRY_SIZE)
> +#define DATA_SEG       (X86_GDT_ENTRY_16BIT_DS * X86_GDT_ENTRY_SIZE)
> +
> +       .code32
> +       .globl __wakeup
> +__wakeup:
> +       /* First prepare the jmp to the resume vector */
> +       mov     0x4(%esp), %eax /* vector */
> +       /* last 4 bits of linear addr are taken as offset */
> +       andw    $0x0f, %ax
> +       movw    %ax, (__wakeup_offset)
> +       mov     0x4(%esp), %eax
> +       /* the rest is taken as segment */
> +       shr     $4, %eax
> +       movw    %ax, (__wakeup_segment)
> +
> +       /* Activate the right segment descriptor real mode */
> +       ljmp    $CODE_SEG, $RELOCATED(1f)
> +1:
> +       /* 16 bit code from here on... */
> +       .code16
> +
> +       /*
> +        * Load the segment registers w/ properly configured
> +        * segment descriptors. They will retain these
> +        * configurations (limits, writability, etc.) once
> +        * protected mode is turned off.

Can you word-wrap to use more columns?

> +        */
> +       mov     $DATA_SEG, %ax
> +       mov     %ax, %ds
> +       mov     %ax, %es
> +       mov     %ax, %fs
> +       mov     %ax, %gs
> +       mov     %ax, %ss
> +
> +       /* Turn off protection */
> +       movl    %cr0, %eax
> +       andl    $~X86_CR0_PE, %eax
> +       movl    %eax, %cr0
> +
> +       /* Now really going into real mode */
> +       ljmp    $0, $RELOCATED(1f)
> +1:
> +       movw    $0x0, %ax
> +       movw    %ax, %ds
> +       movw    %ax, %es
> +       movw    %ax, %ss
> +       movw    %ax, %fs
> +       movw    %ax, %gs
> +
> +       /*
> +        * This is a FAR JMP to the OS waking vector.
> +        * The C code changed the address to be correct.

s/changed/changes/

> +        */
> +       .byte 0xea
> +
> +__wakeup_offset = RELOCATED(.)
> +       .word 0x0000
> +
> +__wakeup_segment = RELOCATED(.)
> +       .word 0x0000
> +
> +       .globl __wakeup_size
> +__wakeup_size:
> +       .long . - __wakeup
> diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h
> index c1cdbd0..f9d4739 100644
> --- a/arch/x86/include/asm/acpi_s3.h
> +++ b/arch/x86/include/asm/acpi_s3.h
> @@ -7,6 +7,8 @@
>  #ifndef __ASM_ACPI_S3_H__
>  #define __ASM_ACPI_S3_H__
>
> +#define WAKEUP_BASE    0x600
> +
>  /* PM1_STATUS register */
>  #define WAK_STS                (1 << 15)
>  #define PCIEXPWAK_STS  (1 << 14)
> @@ -27,6 +29,11 @@
>  #define SLP_TYP_S4     6
>  #define SLP_TYP_S5     7
>
> +#ifndef __ASSEMBLY__
> +
> +extern char __wakeup[];
> +extern int __wakeup_size;

Comments?

> +
>  enum acpi_sleep_state {
>         ACPI_S0,
>         ACPI_S1,
> @@ -93,4 +100,6 @@ enum acpi_sleep_state chipset_prev_sleep_state(void);
>   */
>  void chipset_clear_sleep_state(void);
>
> +#endif /* __ASSEMBLY__ */
> +
>  #endif /* __ASM_ACPI_S3_H__ */
> --
> 2.9.2
>

Regards,
Simon

Patch hide | download patch | download mbox

diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 92a9023..e1c84ce 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -45,6 +45,7 @@  ifndef CONFIG_$(SPL_)X86_64
 obj-$(CONFIG_SMP) += sipi_vector.o
 endif
 obj-y += turbo.o
+obj-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.o
 
 ifeq ($(CONFIG_$(SPL_)X86_64),y)
 obj-y += x86_64/
diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S
new file mode 100644
index 0000000..97b1c21
--- /dev/null
+++ b/arch/x86/cpu/wakeup.S
@@ -0,0 +1,79 @@ 
+/*
+ * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * From coreboot src/arch/x86/wakeup.S
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/acpi_s3.h>
+#include <asm/processor.h>
+#include <asm/processor-flags.h>
+
+#define RELOCATED(x)	(x - __wakeup + WAKEUP_BASE)
+
+#define CODE_SEG	(X86_GDT_ENTRY_16BIT_CS * X86_GDT_ENTRY_SIZE)
+#define DATA_SEG	(X86_GDT_ENTRY_16BIT_DS * X86_GDT_ENTRY_SIZE)
+
+	.code32
+	.globl __wakeup
+__wakeup:
+	/* First prepare the jmp to the resume vector */
+	mov	0x4(%esp), %eax	/* vector */
+	/* last 4 bits of linear addr are taken as offset */
+	andw	$0x0f, %ax
+	movw	%ax, (__wakeup_offset)
+	mov	0x4(%esp), %eax
+	/* the rest is taken as segment */
+	shr	$4, %eax
+	movw	%ax, (__wakeup_segment)
+
+	/* Activate the right segment descriptor real mode */
+	ljmp	$CODE_SEG, $RELOCATED(1f)
+1:
+	/* 16 bit code from here on... */
+	.code16
+
+	/*
+	 * Load the segment registers w/ properly configured
+	 * segment descriptors. They will retain these
+	 * configurations (limits, writability, etc.) once
+	 * protected mode is turned off.
+	 */
+	mov	$DATA_SEG, %ax
+	mov	%ax, %ds
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
+	mov	%ax, %ss
+
+	/* Turn off protection */
+	movl	%cr0, %eax
+	andl	$~X86_CR0_PE, %eax
+	movl	%eax, %cr0
+
+	/* Now really going into real mode */
+	ljmp	$0, $RELOCATED(1f)
+1:
+	movw	$0x0, %ax
+	movw	%ax, %ds
+	movw	%ax, %es
+	movw	%ax, %ss
+	movw	%ax, %fs
+	movw	%ax, %gs
+
+	/*
+	 * This is a FAR JMP to the OS waking vector.
+	 * The C code changed the address to be correct.
+	 */
+	.byte 0xea
+
+__wakeup_offset = RELOCATED(.)
+	.word 0x0000
+
+__wakeup_segment = RELOCATED(.)
+	.word 0x0000
+
+	.globl __wakeup_size
+__wakeup_size:
+	.long . - __wakeup
diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h
index c1cdbd0..f9d4739 100644
--- a/arch/x86/include/asm/acpi_s3.h
+++ b/arch/x86/include/asm/acpi_s3.h
@@ -7,6 +7,8 @@ 
 #ifndef __ASM_ACPI_S3_H__
 #define __ASM_ACPI_S3_H__
 
+#define WAKEUP_BASE	0x600
+
 /* PM1_STATUS register */
 #define WAK_STS		(1 << 15)
 #define PCIEXPWAK_STS	(1 << 14)
@@ -27,6 +29,11 @@ 
 #define SLP_TYP_S4	6
 #define SLP_TYP_S5	7
 
+#ifndef __ASSEMBLY__
+
+extern char __wakeup[];
+extern int __wakeup_size;
+
 enum acpi_sleep_state {
 	ACPI_S0,
 	ACPI_S1,
@@ -93,4 +100,6 @@  enum acpi_sleep_state chipset_prev_sleep_state(void);
  */
 void chipset_clear_sleep_state(void);
 
+#endif /* __ASSEMBLY__ */
+
 #endif /* __ASM_ACPI_S3_H__ */