[U-Boot,05/22] x86: fsp: acpi: Pass different boot mode to FSP init

Message ID 1489674408-17498-6-git-send-email-bmeng.cn@gmail.com
State Superseded
Delegated to: Bin Meng
Headers show

Commit Message

Bin Meng March 16, 2017, 2:26 p.m.
When ACPI S3 resume is turned on, we should pass different boot mode
to FSP init instead of default BOOT_FULL_CONFIG.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/include/asm/acpi_s3.h | 18 ++++++++++++++++++
 arch/x86/lib/fsp/fsp_common.c  | 26 +++++++++++++++++++++++++-
 2 files changed, 43 insertions(+), 1 deletion(-)

Comments

Simon Glass March 21, 2017, 8:06 p.m. | #1
On 16 March 2017 at 08:26, Bin Meng <bmeng.cn@gmail.com> wrote:
> When ACPI S3 resume is turned on, we should pass different boot mode
> to FSP init instead of default BOOT_FULL_CONFIG.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/include/asm/acpi_s3.h | 18 ++++++++++++++++++
>  arch/x86/lib/fsp/fsp_common.c  | 26 +++++++++++++++++++++++++-
>  2 files changed, 43 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

Patch

diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h
index 6fbfc3e..74878c1 100644
--- a/arch/x86/include/asm/acpi_s3.h
+++ b/arch/x86/include/asm/acpi_s3.h
@@ -55,4 +55,22 @@  static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt)
 	return -1;
 }
 
+/**
+ * chipset_prev_sleep_state() - Get chipset previous sleep state
+ *
+ * This returns chipset previous sleep state from ACPI registers.
+ * Platform codes must supply this routine in order to support ACPI S3.
+ *
+ * @return ACPI_S0/S1/S2/S3/S4/S5.
+ */
+enum acpi_sleep_state chipset_prev_sleep_state(void);
+
+/**
+ * chipset_clear_sleep_state() - Clear chipset sleep state
+ *
+ * This clears chipset sleep state in ACPI registers.
+ * Platform codes must supply this routine in order to support ACPI S3.
+ */
+void chipset_clear_sleep_state(void);
+
 #endif /* __ASM_ACPI_S3_H__ */
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 8479af1..2058ee3 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -6,6 +6,7 @@ 
 
 #include <common.h>
 #include <errno.h>
+#include <asm/acpi_s3.h>
 #include <asm/io.h>
 #include <asm/mrccache.h>
 #include <asm/post.h>
@@ -73,6 +74,10 @@  static __maybe_unused void *fsp_prepare_mrc_cache(void)
 int x86_fsp_init(void)
 {
 	void *nvs;
+	int boot_mode = BOOT_FULL_CONFIG;
+#ifdef CONFIG_HAVE_ACPI_RESUME
+	int prev_sleep_state = chipset_prev_sleep_state();
+#endif
 
 	if (!gd->arch.hob_list) {
 #ifdef CONFIG_ENABLE_MRC_CACHE
@@ -80,12 +85,31 @@  int x86_fsp_init(void)
 #else
 		nvs = NULL;
 #endif
+
+#ifdef CONFIG_HAVE_ACPI_RESUME
+		if (prev_sleep_state == ACPI_S3) {
+			if (nvs == NULL) {
+				/* If waking from S3 and no cache then */
+				debug("No MRC cache found in S3 resume path\n");
+				post_code(POST_RESUME_FAILURE);
+				/* Clear Sleep Type */
+				chipset_clear_sleep_state();
+				/* Reboot */
+				debug("Rebooting..\n");
+				reset_cpu(0);
+				/* Should not reach here.. */
+				panic("Reboot System");
+			}
+
+			boot_mode = BOOT_ON_S3_RESUME;
+		}
+#endif
 		/*
 		 * The first time we enter here, call fsp_init().
 		 * Note the execution does not return to this function,
 		 * instead it jumps to fsp_continue().
 		 */
-		fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
+		fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, boot_mode, nvs);
 	} else {
 		/*
 		 * The second time we enter here, adjust the size of malloc()