@@ -38,6 +38,25 @@
#define _RPAGE_RSV4 0x0200000000000000UL
#define _RPAGE_RPN0 0x01000
#define _RPAGE_RPN1 0x02000
+/* Max physicall address bit as per radix table */
+#define _RPAGE_PA_MAX 57
+ * Max physical address bit we will use for now.
+ * This is mostly a hardware limitation and for now Power9 has
+ * a 51 bit limit.
+ * This is different from the number of physical bit required to address
+ * the last byte of memory. That is defined by MAX_PHYSMEM_BITS.
+ * MAX_PHYSMEM_BITS is a linux limitation imposed by the maximum
+ * number of sections we can support (SECTIONS_SHIFT).
+ * This is different from Radix page table limitation above and
+ * should always be less than that. The limit is done such that
+ * we can overload the bits between _RPAGE_PA_MAX and _PAGE_PA_MAX
+ * for hash linux page table specific bits.
+#define _PAGE_PA_MAX 51
#define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
#define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
@@ -51,10 +70,11 @@
#define _PAGE_NO_CACHE _PAGE_TOLERANT
- * We support 57 bit real address in pte. Clear everything above 57, and
+ * We support _RPAGE_PA_MAX bit real address in pte. On the linux side
+ * we are limited by _PAGE_PA_MAX. Clear everything above _PAGE_PA_MAX
* every thing below PAGE_SHIFT;
-#define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
+#define PTE_RPN_MASK (((1UL << _PAGE_PA_MAX) - 1) & (PAGE_MASK))
* set of bits not changed in pmd_modify. Even though we have hash specific bits
* in here, on radix we expect them to be zero.