@@ -60,6 +60,8 @@ int arch_cpu_init(void)
(V7M_MPU_RASR_XN_ENABLE
| V7M_MPU_RASR_AP_RW_RW
| 0x01 << V7M_MPU_RASR_TEX_SHIFT
+ | 0x01 << V7M_MPU_RASR_B_SHIFT
+ | 0x01 << V7M_MPU_RASR_C_SHIFT
| V7M_MPU_RASR_SIZE_8MB
| V7M_MPU_RASR_EN)
, &V7M_MPU->rasr
@@ -14,9 +14,6 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
#define CONFIG_SYS_TEXT_BASE 0x08000000
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-
/*
* Configuration of the external SDRAM memory
*/
@@ -82,4 +79,5 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_MEM
+#define CONFIG_CMD_CACHE
#endif /* __CONFIG_H */
It also enables commands for cache enable/disable/status. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> --- Changed in v3: None Changed in v2: None arch/arm/mach-stm32/stm32f7/soc.c | 2 ++ include/configs/stm32f746-disco.h | 4 +--- 2 files changed, 3 insertions(+), 3 deletions(-)