@@ -483,7 +483,7 @@ static void escc_mem_write(void *opaque, hwaddr addr,
s = &serial->chn[channel];
switch (saddr) {
case SERIAL_CTRL:
- trace_escc_mem_writeb_ctrl(CHN_C(s), s->reg, val & 0xff);
+ trace_escc_mem_writeb_ctrl(CHN_C(s), s->reg, (uint8_t) val);
newreg = 0;
switch (s->reg) {
case W_CMD:
@@ -553,7 +553,7 @@ static void escc_mem_write(void *opaque, hwaddr addr,
s->reg = 0;
break;
case SERIAL_DATA:
- trace_escc_mem_writeb_data(CHN_C(s), val);
+ trace_escc_mem_writeb_data(CHN_C(s), (uint8_t) val);
s->tx = val;
if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { // tx enabled
if (qemu_chr_fe_get_driver(&s->chr)) {
@@ -13,7 +13,7 @@ virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
# hw/char/grlib_apbuart.c
grlib_apbuart_event(int event) "event:%d"
-grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
+grlib_apbuart_writel_unknown(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%" PRIx64
grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
# hw/char/lm32_juart.c
@@ -23,13 +23,13 @@ lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
# hw/char/lm32_uart.c
-lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
-lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
+lm32_uart_memory_write(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_PRIx " value 0x%08" PRIx64
+lm32_uart_memory_read(hwaddr addr, uint32_t value) "addr 0x%08" HWADDR_PRIx " value 0x%08x"
lm32_uart_irq_state(int level) "irq state %d"
# hw/char/milkymist-uart.c
-milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
-milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
+milkymist_uart_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR_PRIx " value %08x"
+milkymist_uart_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADDR_PRIx " value %08" PRIx64
milkymist_uart_raise_irq(void) "Raise IRQ"
milkymist_uart_lower_irq(void) "Lower IRQ"
@@ -50,9 +50,9 @@ escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x
# hw/char/pl011.c
pl011_irq_state(int level) "irq state %d"
-pl011_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
+pl011_read(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_PRIx " value 0x%08" PRIx64
pl011_read_fifo(int read_count) "FIFO read, read_count now %d"
-pl011_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
+pl011_write(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_PRIx " value 0x%08" PRIx64
pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR %08x read_count %d returning %d"
pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d"
pl011_put_fifo_full(void) "FIFO now full, RXFF set"
An upcoming patch will let the compiler warn us when we are silently losing precision in traces. In most cases, we just update the trace definitions to match the caller types; but in one case, the caller had already done 'val &= 0xff' so casting uint64_t val down to the type expected by the trace is sufficient. Signed-off-by: Eric Blake <eblake@redhat.com> --- hw/char/escc.c | 4 ++-- hw/char/trace-events | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-)