| Submitter | Haiying Wang |
|---|---|
| Date | Dec. 1, 2010, 3:35 p.m. |
| Message ID | <1291217737-3870-2-git-send-email-Haiying.Wang@freescale.com> |
| Download | mbox | patch |
| Permalink | /patch/73830/ |
| State | Accepted |
| Delegated to: | Kumar Gala |
| Headers | show |
Comments
On Dec 1, 2010, at 9:35 AM, <Haiying.Wang@freescale.com> <Haiying.Wang@freescale.com> wrote: > From: Haiying Wang <Haiying.Wang@freescale.com> > > This fixes the compiling error for the board which doesn't have NOR flash > (so CONFIG_FLASH_BASE is not defined) > > Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> > --- > arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) applied to 85xx - k
Patch
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 27236a0..4b8faa5 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -327,7 +327,7 @@ int cpu_init_r(void) if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { puts("already enabled"); l2srbar = l2cache->l2srbar0; -#ifdef CONFIG_SYS_INIT_L2_ADDR +#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE && l2srbar >= CONFIG_SYS_FLASH_BASE) { l2srbar = CONFIG_SYS_INIT_L2_ADDR;