From patchwork Tue Nov 30 06:56:01 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 73573 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 9AD41B70EA for ; Tue, 30 Nov 2010 17:56:19 +1100 (EST) Received: (qmail 18122 invoked by alias); 30 Nov 2010 06:56:17 -0000 Received: (qmail 18114 invoked by uid 22791); 30 Nov 2010 06:56:16 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 30 Nov 2010 06:56:10 +0000 Received: (qmail 19138 invoked from network); 30 Nov 2010 06:56:08 -0000 Received: from unknown (HELO ?192.168.0.102?) (yao@127.0.0.2) by mail.codesourcery.com with ESMTPA; 30 Nov 2010 06:56:08 -0000 Message-ID: <4CF4A001.20505@codesourcery.com> Date: Tue, 30 Nov 2010 14:56:01 +0800 From: Yao Qi User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.15) Gecko/20101027 Thunderbird/3.0.10 MIME-Version: 1.0 To: GCC Patches Subject: [patch, arm] VFP_D0_D7_REGS in predicate vfp_register_operand X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org predicate "vfp_register_operand" returns false to VFP_D0_D7_REGS registers, which is not correct. This patch is to address this. Regression test is not run, since this change is a little bit obvious. OK for mainline? gcc/ * arm/predicates.md ("vfp_register_operand"): Return true for VFP_D0_D7_REGS classes. diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index cbb2af7..bb0ff83 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -83,6 +83,7 @@ to be a register operand. */ return (GET_CODE (op) == REG && (REGNO (op) >= FIRST_PSEUDO_REGISTER + || REGNO_REG_CLASS (REGNO (op)) == VFP_D0_D7_REGS || REGNO_REG_CLASS (REGNO (op)) == VFP_LO_REGS || (TARGET_VFPD32 && REGNO_REG_CLASS (REGNO (op)) == VFP_REGS)));