From patchwork Fri Mar 3 23:32:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Roth X-Patchwork-Id: 735254 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vZlr03W0Nz9rvt for ; Sat, 4 Mar 2017 10:33:52 +1100 (AEDT) Received: from localhost ([::1]:60861 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjwhp-0003Ml-Tv for incoming@patchwork.ozlabs.org; Fri, 03 Mar 2017 18:33:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50408) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjwhR-0003Lz-LK for qemu-devel@nongnu.org; Fri, 03 Mar 2017 18:33:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjwhO-0003x2-J3 for qemu-devel@nongnu.org; Fri, 03 Mar 2017 18:33:25 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:43034) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cjwhO-0003w5-9v for qemu-devel@nongnu.org; Fri, 03 Mar 2017 18:33:22 -0500 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v23NSgcn087913 for ; Fri, 3 Mar 2017 18:33:20 -0500 Received: from e37.co.us.ibm.com (e37.co.us.ibm.com [32.97.110.158]) by mx0a-001b2d01.pphosted.com with ESMTP id 28xs8f6vj2-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 03 Mar 2017 18:33:19 -0500 Received: from localhost by e37.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 3 Mar 2017 16:33:16 -0700 Received: from b03cxnp08028.gho.boulder.ibm.com (b03cxnp08028.gho.boulder.ibm.com [9.17.130.20]) by d03dlp03.boulder.ibm.com (Postfix) with ESMTP id AE57919D801C; Fri, 3 Mar 2017 16:32:26 -0700 (MST) Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v23NXFjj66388222; Fri, 3 Mar 2017 16:33:15 -0700 Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AA26FC603E; Fri, 3 Mar 2017 16:33:15 -0700 (MST) Received: from localhost (unknown [9.80.106.253]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP id 6EFE0C6037; Fri, 3 Mar 2017 16:33:15 -0700 (MST) From: Michael Roth To: qemu-devel@nongnu.org Date: Fri, 3 Mar 2017 17:32:57 -0600 X-Mailer: git-send-email 2.7.4 X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 17030323-0024-0000-0000-0000160AE37C X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006717; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000206; SDB=6.00829729; UDB=6.00406810; IPR=6.00607225; BA=6.00005186; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00014514; XFM=3.00000012; UTC=2017-03-03 23:33:18 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17030323-0025-0000-0000-00004939367E Message-Id: <1488583977-32253-1-git-send-email-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-03_16:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=29 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703030205 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v2] spapr_pci: allow control of BAR alignment through SLOF X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Nikunj A Dadhania , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" In certain cases, such as PCI-passthrough with VFIO, we cannot offload MMIO accesses to KVM unless the BAR alignment matches the host. This patch, in conjunction with a separately submitted patch for SLOF which allows for control of this via the device-tree, allows us to set this alignment via QEMU. Cc: qemu-ppc@nongnu.org Cc: Nikunj A Dadhania Cc: David Gibson Cc: Alexey Kardashevskiy Signed-off-by: Michael Roth --- v2: * Keep natural alignment as the default in SLOF, only set DT prop if different alignment is specified by QEMU (David) --- hw/ppc/spapr.c | 7 ++++++- hw/ppc/spapr_pci.c | 10 ++++++++++ include/hw/pci-host/spapr.h | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 14192ac..ef8df35 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3166,7 +3166,12 @@ DEFINE_SPAPR_MACHINE(2_9, "2.9", true); * pseries-2.8 */ #define SPAPR_COMPAT_2_8 \ - HW_COMPAT_2_8 + HW_COMPAT_2_8 \ + { \ + .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \ + .property = "mem_bar_min_align", \ + .value = "0", \ + }, \ static void spapr_machine_2_8_instance_options(MachineState *machine) { diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 919d3c2..485d32d 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1664,6 +1664,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) return; } + if (sphb->mem_bar_min_align == (uint64_t)-1) { + sphb->mem_bar_min_align = qemu_real_host_page_size; + } + sphb->dtbusname = g_strdup_printf("pci@%" PRIx64, sphb->buid); namebuf = alloca(strlen(sphb->dtbusname) + 32); @@ -1858,6 +1862,8 @@ static Property spapr_phb_properties[] = { DEFINE_PROP_UINT32("numa_node", sPAPRPHBState, numa_node, -1), DEFINE_PROP_BOOL("pre-2.8-migration", sPAPRPHBState, pre_2_8_migration, false), + DEFINE_PROP_UINT64("mem_bar_min_align", sPAPRPHBState, mem_bar_min_align, + -1), DEFINE_PROP_END_OF_LIST(), }; @@ -2228,6 +2234,10 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, if (ret) { return ret; } + if (phb->mem_bar_min_align) { + _FDT(fdt_setprop_cell(fdt, bus_off, "qemu,mem-bar-min-align", + phb->mem_bar_min_align)); + } return 0; } diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index dfa7614..fa33346 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -79,6 +79,7 @@ struct sPAPRPHBState { uint64_t dma64_win_addr; uint32_t numa_node; + uint64_t mem_bar_min_align; /* Fields for migration compatibility hacks */ bool pre_2_8_migration;