Message ID | 20170303032507.16142-1-david@gibson.dropbear.id.au |
---|---|
State | New |
Headers | show |
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20170303032507.16142-1-david@gibson.dropbear.id.au Type: series Subject: [Qemu-devel] [PULL 00/17] ppc-for-2.9 queue 20170303 === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 # Useful git options git config --local diff.renamelimit 0 git config --local diff.renames True commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu * [new tag] patchew/20170303032507.16142-1-david@gibson.dropbear.id.au -> patchew/20170303032507.16142-1-david@gibson.dropbear.id.au Switched to a new branch 'test' 3246067 target/ppc: rewrite f[n]m[add, sub] using float64_muladd 2043060 spapr: Small cleanup of PPC MMU enums 50dc395 spapr_pci: Advertise access to PCIe extended config space c68d6be target/ppc: Rework hash mmu page fault code and add defines for clarity 809a3f5 target/ppc: Move no-execute and guarded page checking into new function cbddae7 target/ppc: Add execute permission checking to access authority check 5438e36 target/ppc: Add Instruction Authority Mask Register Check 8f0f27f hw/ppc/spapr: Add POWER9 to pseries cpu models a6391c2 target/ppc/POWER9: Add cpu_has_work function for POWER9 1dfd4de target/ppc/POWER9: Add POWER9 pa-features definition 8bd6f88 target/ppc/POWER9: Add POWER9 mmu fault handler fcbb600 target/ppc: Don't gen an SDR1 on POWER9 and rework register creation 98f9781 target/ppc: Add patb_entry to sPAPRMachineState 26b2ad3 target/ppc/POWER9: Add POWERPC_MMU_V3 bit 7b77fce powernv: Don't test POWER9 CPU yet a076e26 exec, kvm, target-ppc: Move getrampagesize() to common code c53f459 target/ppc: Add POWER9/ISAv3.00 to compat_table === OUTPUT BEGIN === Checking PATCH 1/17: target/ppc: Add POWER9/ISAv3.00 to compat_table... Checking PATCH 2/17: exec, kvm, target-ppc: Move getrampagesize() to common code... WARNING: architecture specific defines should be avoided #117: FILE: exec.c:1341: +#ifdef __linux__ total: 0 errors, 1 warnings, 287 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 3/17: powernv: Don't test POWER9 CPU yet... ERROR: if this code is redundant consider removing it #42: FILE: tests/pnv-xscom-test.c:45: +#if 0 /* POWER9 support is not ready yet */ total: 1 errors, 0 warnings, 25 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 4/17: target/ppc/POWER9: Add POWERPC_MMU_V3 bit... Checking PATCH 5/17: target/ppc: Add patb_entry to sPAPRMachineState... Checking PATCH 6/17: target/ppc: Don't gen an SDR1 on POWER9 and rework register creation... Checking PATCH 7/17: target/ppc/POWER9: Add POWER9 mmu fault handler... Checking PATCH 8/17: target/ppc/POWER9: Add POWER9 pa-features definition... Checking PATCH 9/17: target/ppc/POWER9: Add cpu_has_work function for POWER9... Checking PATCH 10/17: hw/ppc/spapr: Add POWER9 to pseries cpu models... Checking PATCH 11/17: target/ppc: Add Instruction Authority Mask Register Check... Checking PATCH 12/17: target/ppc: Add execute permission checking to access authority check... Checking PATCH 13/17: target/ppc: Move no-execute and guarded page checking into new function... Checking PATCH 14/17: target/ppc: Rework hash mmu page fault code and add defines for clarity... Checking PATCH 15/17: spapr_pci: Advertise access to PCIe extended config space... Checking PATCH 16/17: spapr: Small cleanup of PPC MMU enums... Checking PATCH 17/17: target/ppc: rewrite f[n]m[add, sub] using float64_muladd... === OUTPUT END === Test command exited with code: 1 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-devel@freelists.org
On Thu, Mar 02, 2017 at 07:40:58PM -0800, no-reply@patchew.org wrote: > Hi, > > This series seems to have some coding style problems. See output below for > more information: > > Message-id: 20170303032507.16142-1-david@gibson.dropbear.id.au > Type: series > Subject: [Qemu-devel] [PULL 00/17] ppc-for-2.9 queue 20170303 > > === TEST SCRIPT BEGIN === > #!/bin/bash > > BASE=base > n=1 > total=$(git log --oneline $BASE.. | wc -l) > failed=0 > > # Useful git options > git config --local diff.renamelimit 0 > git config --local diff.renames True > > commits="$(git log --format=%H --reverse $BASE..)" > for c in $commits; do > echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." > if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then > failed=1 > echo > fi > n=$((n+1)) > done > > exit $failed > === TEST SCRIPT END === > > Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 > From https://github.com/patchew-project/qemu > * [new tag] patchew/20170303032507.16142-1-david@gibson.dropbear.id.au -> patchew/20170303032507.16142-1-david@gibson.dropbear.id.au > Switched to a new branch 'test' > 3246067 target/ppc: rewrite f[n]m[add, sub] using float64_muladd > 2043060 spapr: Small cleanup of PPC MMU enums > 50dc395 spapr_pci: Advertise access to PCIe extended config space > c68d6be target/ppc: Rework hash mmu page fault code and add defines for clarity > 809a3f5 target/ppc: Move no-execute and guarded page checking into new function > cbddae7 target/ppc: Add execute permission checking to access authority check > 5438e36 target/ppc: Add Instruction Authority Mask Register Check > 8f0f27f hw/ppc/spapr: Add POWER9 to pseries cpu models > a6391c2 target/ppc/POWER9: Add cpu_has_work function for POWER9 > 1dfd4de target/ppc/POWER9: Add POWER9 pa-features definition > 8bd6f88 target/ppc/POWER9: Add POWER9 mmu fault handler > fcbb600 target/ppc: Don't gen an SDR1 on POWER9 and rework register creation > 98f9781 target/ppc: Add patb_entry to sPAPRMachineState > 26b2ad3 target/ppc/POWER9: Add POWERPC_MMU_V3 bit > 7b77fce powernv: Don't test POWER9 CPU yet > a076e26 exec, kvm, target-ppc: Move getrampagesize() to common code > c53f459 target/ppc: Add POWER9/ISAv3.00 to compat_table > > === OUTPUT BEGIN === > Checking PATCH 1/17: target/ppc: Add POWER9/ISAv3.00 to compat_table... > Checking PATCH 2/17: exec, kvm, target-ppc: Move getrampagesize() to common code... > WARNING: architecture specific defines should be avoided > #117: FILE: exec.c:1341: > +#ifdef __linux__ > > total: 0 errors, 1 warnings, 287 lines checked This is just a code motion, so not a new warning. > Your patch has style problems, please review. If any of these errors > are false positives report them to the maintainer, see > CHECKPATCH in MAINTAINERS. > Checking PATCH 3/17: powernv: Don't test POWER9 CPU yet... > ERROR: if this code is redundant consider removing it > #42: FILE: tests/pnv-xscom-test.c:45: > +#if 0 /* POWER9 support is not ready yet */ > > total: 1 errors, 0 warnings, 25 lines checked And the #if 0ed code here will be useful in future. So I think it's reasonable to overlook these two style warnings. > Your patch has style problems, please review. If any of these errors > are false positives report them to the maintainer, see > CHECKPATCH in MAINTAINERS. > > Checking PATCH 4/17: target/ppc/POWER9: Add POWERPC_MMU_V3 bit... > Checking PATCH 5/17: target/ppc: Add patb_entry to sPAPRMachineState... > Checking PATCH 6/17: target/ppc: Don't gen an SDR1 on POWER9 and rework register creation... > Checking PATCH 7/17: target/ppc/POWER9: Add POWER9 mmu fault handler... > Checking PATCH 8/17: target/ppc/POWER9: Add POWER9 pa-features definition... > Checking PATCH 9/17: target/ppc/POWER9: Add cpu_has_work function for POWER9... > Checking PATCH 10/17: hw/ppc/spapr: Add POWER9 to pseries cpu models... > Checking PATCH 11/17: target/ppc: Add Instruction Authority Mask Register Check... > Checking PATCH 12/17: target/ppc: Add execute permission checking to access authority check... > Checking PATCH 13/17: target/ppc: Move no-execute and guarded page checking into new function... > Checking PATCH 14/17: target/ppc: Rework hash mmu page fault code and add defines for clarity... > Checking PATCH 15/17: spapr_pci: Advertise access to PCIe extended config space... > Checking PATCH 16/17: spapr: Small cleanup of PPC MMU enums... > Checking PATCH 17/17: target/ppc: rewrite f[n]m[add, sub] using float64_muladd... > === OUTPUT END === > > Test command exited with code: 1 > > > --- > Email generated automatically by Patchew [http://patchew.org/]. > Please send your feedback to patchew-devel@freelists.org
On 3 March 2017 at 03:24, David Gibson <david@gibson.dropbear.id.au> wrote: > The following changes since commit ecb24d334af1a98ef0329f4b3b0e14ae8cb8770d: > > Merge remote-tracking branch 'remotes/rth/tags/pull-tgt-20170302' into staging (2017-03-02 22:06:41 +0000) > > are available in the git repository at: > > git://github.com/dgibson/qemu.git tags/ppc-for-2.9-20170303 > > for you to fetch changes up to 992d7e976c7eca2b3129cd4bae4a0d350a8065fa: > > target/ppc: rewrite f[n]m[add,sub] using float64_muladd (2017-03-03 11:38:33 +1100) > > ---------------------------------------------------------------- > ppc patch queuye for 2017-03-03 > > This will probably be my last pull request before the hard freeze. It > has some new work, but that has all been posted in draft before the > soft freeze, so I think it's reasonable to include in qemu-2.9. The rule is: pull requests on the list by the softfreeze date, no new features after that... "OK if a patch hit the list before softfreeze" was the old rule which we had for 2.7 and earlier. thanks -- PMM
On 3 March 2017 at 03:24, David Gibson <david@gibson.dropbear.id.au> wrote: > The following changes since commit ecb24d334af1a98ef0329f4b3b0e14ae8cb8770d: > > Merge remote-tracking branch 'remotes/rth/tags/pull-tgt-20170302' into staging (2017-03-02 22:06:41 +0000) > > are available in the git repository at: > > git://github.com/dgibson/qemu.git tags/ppc-for-2.9-20170303 > > for you to fetch changes up to 992d7e976c7eca2b3129cd4bae4a0d350a8065fa: > > target/ppc: rewrite f[n]m[add,sub] using float64_muladd (2017-03-03 11:38:33 +1100) > > ---------------------------------------------------------------- > ppc patch queuye for 2017-03-03 > > This will probably be my last pull request before the hard freeze. It > has some new work, but that has all been posted in draft before the > soft freeze, so I think it's reasonable to include in qemu-2.9. > > This batch has: > * A substantial amount of POWER9 work > * Implements the legacy (hash) MMU for POWER9 > * Some more preliminaries for implementing the POWER9 radix > MMU > * POWER9 has_work > * Basic POWER9 compatibility mode handling > * Removal of some premature tests > * Some cleanups and fixes to the existing MMU code to make the > POWER9 work simpler > * A bugfix for TCG multiply adds on power > * Allow pseries guests to access PCIe extended config space > > This also includes a code-motion not strictly in ppc code - moving > getrampagesize() from ppc code to exec.c. This will make some future > VFIO improvements easier, Paolo said it was ok to merge via my tree. > > ---------------------------------------------------------------- Applied, thanks. -- PMM