From patchwork Mon Nov 29 15:33:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?David_M=C3=BCller_=28ELSOFT_AG=29?= X-Patchwork-Id: 73438 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F12C01007D1 for ; Tue, 30 Nov 2010 02:51:13 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A7A9C28297; Mon, 29 Nov 2010 16:51:12 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QTnWyhb5jRpJ; Mon, 29 Nov 2010 16:51:12 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 32FA328299; Mon, 29 Nov 2010 16:51:10 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E0F2828299 for ; Mon, 29 Nov 2010 16:51:07 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GPfFBTAP-L5E for ; Mon, 29 Nov 2010 16:51:07 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail4.hostpark.net (mail4.hostpark.net [212.243.197.34]) by theia.denx.de (Postfix) with ESMTPS id 58A5528297 for ; Mon, 29 Nov 2010 16:51:07 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by mail4.hostpark.net (Postfix) with ESMTP id DDA004C2DB; Mon, 29 Nov 2010 16:33:46 +0100 (CET) X-Virus-Scanned: by Hostpark/NetZone Mailprotection at hostpark.net Received: from mail4.hostpark.net ([127.0.0.1]) by localhost (mail4.hostpark.net [127.0.0.1]) (amavisd-new, port 10124) with ESMTP id eL1CkLM1qFAP; Mon, 29 Nov 2010 16:33:46 +0100 (CET) Received: from [192.168.11.10] (80-218-33-144.dclient.hispeed.ch [80.218.33.144]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail4.hostpark.net (Postfix) with ESMTP id 705524C2BD; Mon, 29 Nov 2010 16:33:46 +0100 (CET) Message-ID: <4CF3C7E2.3000008@elsoft.ch> Date: Mon, 29 Nov 2010 16:33:54 +0100 From: =?ISO-8859-1?Q?=22David_M=FCller_=28ELSOFT_AG=29=22?= Organization: ELSOFT AG User-Agent: Mozilla/5.0 (X11; U; Linux i686; de; rv:1.9.1.15) Gecko/20101027 SeaMonkey/2.0.10 MIME-Version: 1.0 To: u-boot@lists.denx.de References: <4CB2F602.30103@elsoft.ch> In-Reply-To: <4CB2F602.30103@elsoft.ch> X-Enigmail-Version: 1.0.1 Subject: [U-Boot] [PATCH] fix s3c24x0 timer code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Hello The attached patch fixes the s3c24x0 timer code to work with the ARM relocation feature. Dave Signed-off-by: David Mueller diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index 8cf9ff6..2903ba7 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -35,8 +35,7 @@ #include #include -int timer_load_val = 0; -static ulong timer_clk; +DECLARE_GLOBAL_DATA_PTR; /* macro to read the 16 bit timer */ static inline ulong READ_TIMER(void) @@ -46,9 +45,6 @@ static inline ulong READ_TIMER(void) return readl(&timers->tcnto4) & 0xffff; } -static ulong timestamp; -static ulong lastdec; - int timer_init(void) { struct s3c24x0_timers *timers = s3c24x0_get_base_timers(); @@ -57,27 +53,27 @@ int timer_init(void) /* use PWM Timer 4 because it has no output */ /* prescaler for Timer 4 is 16 */ writel(0x0f00, &timers->tcfg0); - if (timer_load_val == 0) { + if (gd->timer_load_val == 0) { /* * for 10 ms clock period @ PCLK with 4 bit divider = 1/2 * (default) and prescaler = 16. Should be 10390 * @33.25MHz and 15625 @ 50 MHz */ - timer_load_val = get_PCLK() / (2 * 16 * 100); - timer_clk = get_PCLK() / (2 * 16); + gd->timer_load_val = get_PCLK() / (2 * 16 * 100); + gd->timer_clk = get_PCLK() / (2 * 16); } /* load value for 10 ms timeout */ - lastdec = timer_load_val; - writel(timer_load_val, &timers->tcntb4); + gd->lastdec = gd->timer_load_val; + writel(gd->timer_load_val, &timers->tcntb4); /* auto load, manual update of timer 4 */ tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000; writel(tmr, &timers->tcon); /* auto load, start timer 4 */ tmr = (tmr & ~0x0700000) | 0x0500000; writel(tmr, &timers->tcon); - timestamp = 0; + gd->timestamp = 0; - return (0); + return 0; } /* @@ -96,7 +92,7 @@ ulong get_timer(ulong base) void set_timer(ulong t) { - timestamp = t; + gd->timestamp = t; } void __udelay (unsigned long usec) @@ -105,7 +101,7 @@ void __udelay (unsigned long usec) ulong start = get_ticks(); tmo = usec / 1000; - tmo *= (timer_load_val * 100); + tmo *= (gd->timer_load_val * 100); tmo /= 1000; while ((ulong) (get_ticks() - start) < tmo) @@ -115,15 +111,15 @@ void __udelay (unsigned long usec) void reset_timer_masked(void) { /* reset time */ - lastdec = READ_TIMER(); - timestamp = 0; + gd->lastdec = READ_TIMER(); + gd->timestamp = 0; } ulong get_timer_masked(void) { ulong tmr = get_ticks(); - return tmr / (timer_clk / CONFIG_SYS_HZ); + return tmr / (gd->timer_clk / CONFIG_SYS_HZ); } void udelay_masked(unsigned long usec) @@ -134,10 +130,10 @@ void udelay_masked(unsigned long usec) if (usec >= 1000) { tmo = usec / 1000; - tmo *= (timer_load_val * 100); + tmo *= (gd->timer_load_val * 100); tmo /= 1000; } else { - tmo = usec * (timer_load_val * 100); + tmo = usec * (gd->timer_load_val * 100); tmo /= (1000 * 1000); } @@ -157,16 +153,16 @@ unsigned long long get_ticks(void) { ulong now = READ_TIMER(); - if (lastdec >= now) { + if (gd->lastdec >= now) { /* normal mode */ - timestamp += lastdec - now; + gd->timestamp += gd->lastdec - now; } else { /* we have an overflow ... */ - timestamp += lastdec + timer_load_val - now; + gd->timestamp += gd->lastdec + gd->timer_load_val - now; } - lastdec = now; + gd->lastdec = now; - return timestamp; + return gd->timestamp; } /* @@ -178,7 +174,7 @@ ulong get_tbclk(void) ulong tbclk; #if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB) - tbclk = timer_load_val * 100; + tbclk = gd->timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \ defined(CONFIG_S3C2440) || \ diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index ada3fbb..799943c 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -61,6 +61,13 @@ typedef struct global_data { unsigned long tbu; unsigned long long timer_reset_value; #endif +#ifdef CONFIG_S3C24X0 + /* "static data" needed by s3c24x0 timer.c */ + unsigned long timer_load_val; + unsigned long timer_clk; + unsigned long timestamp; + unsigned long lastdec; +#endif unsigned long relocaddr; /* Start address of U-Boot in RAM */ phys_size_t ram_size; /* RAM size */ unsigned long mon_len; /* monitor len */