| Message ID | 20170228063535.32069-6-afaerber@suse.de |
|---|---|
| State | New |
| Headers | show |
Daniel, Am 28.02.2017 um 07:35 schrieb Andreas Färber: > The Actions Semi S900 SoC provides four 32-bit timers, TIMER0/1/2/3, > but no 2Hz timers. > > Deal with the S500 having less timers. > > An S900 datasheet can be found in 96Boards documentation: > https://github.com/96boards/documentation/blob/master/ConsumerEdition/Bubblegum-96/HardwareDocs/SoC_bubblegum96.pdf > > Signed-off-by: Andreas Färber <afaerber@suse.de> [...] > @@ -126,10 +127,20 @@ static irqreturn_t owl_timer1_interrupt(int irq, void *dev_id) > static const struct owl_timer_info s500_timer_info = { > .timer_offset[0] = 0x08, > .timer_offset[1] = 0x14, > + .timer_offset[2] = -1, > + .timer_offset[3] = -1, > +}; > + > +static const struct owl_timer_info s900_timer_info = { > + .timer_offset[0] = 0x08, > + .timer_offset[1] = 0x14, > + .timer_offset[2] = 0x30, > + .timer_offset[3] = 0x3c, > }; I noticed later that the S900 manual describes TIMER2/3 as "used only in Secure mode". My driver code resetting them seems to work though. Should we just drop these extra timer initializations then to make the driver simpler and more performant again? I'd still like to keep the two compatible strings in the DT though, and we may want to disable the 2Hz timers on S500 just in case. Regards, Andreas
On Tue, Feb 28, 2017 at 06:16:10PM +0100, Andreas Färber wrote: > Daniel, > > Am 28.02.2017 um 07:35 schrieb Andreas Färber: > > The Actions Semi S900 SoC provides four 32-bit timers, TIMER0/1/2/3, > > but no 2Hz timers. > > > > Deal with the S500 having less timers. > > > > An S900 datasheet can be found in 96Boards documentation: > > https://github.com/96boards/documentation/blob/master/ConsumerEdition/Bubblegum-96/HardwareDocs/SoC_bubblegum96.pdf > > > > Signed-off-by: Andreas Färber <afaerber@suse.de> > [...] > > @@ -126,10 +127,20 @@ static irqreturn_t owl_timer1_interrupt(int irq, void *dev_id) > > static const struct owl_timer_info s500_timer_info = { > > .timer_offset[0] = 0x08, > > .timer_offset[1] = 0x14, > > + .timer_offset[2] = -1, > > + .timer_offset[3] = -1, > > +}; > > + > > +static const struct owl_timer_info s900_timer_info = { > > + .timer_offset[0] = 0x08, > > + .timer_offset[1] = 0x14, > > + .timer_offset[2] = 0x30, > > + .timer_offset[3] = 0x3c, > > }; > > I noticed later that the S900 manual describes TIMER2/3 as "used only in > Secure mode". My driver code resetting them seems to work though. > > Should we just drop these extra timer initializations then to make the > driver simpler and more performant again? I'd still like to keep the two > compatible strings in the DT though, and we may want to disable the 2Hz > timers on S500 just in case. Yes, makes sense. > -- > SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany > GF: Felix Imendörffer, Jane Smithard, Graham Norton > HRB 21284 (AG Nürnberg)
diff --git a/drivers/clocksource/owl-timer.c b/drivers/clocksource/owl-timer.c index 1b1e26d..babbfd5 100644 --- a/drivers/clocksource/owl-timer.c +++ b/drivers/clocksource/owl-timer.c @@ -31,7 +31,7 @@ #define OWL_Tx_CTL_INTEN BIT(1) #define OWL_Tx_CTL_EN BIT(2) -#define OWL_MAX_Tx 2 +#define OWL_MAX_Tx 4 struct owl_timer_info { int timer_offset[OWL_MAX_Tx]; @@ -43,7 +43,8 @@ static void __iomem *owl_timer_base; static inline void __iomem *owl_timer_get_base(unsigned timer_nr) { - if (timer_nr >= OWL_MAX_Tx) + if (timer_nr >= OWL_MAX_Tx || + owl_timer_info->timer_offset[timer_nr] == -1) return NULL; return owl_timer_base + owl_timer_info->timer_offset[timer_nr]; @@ -126,10 +127,20 @@ static irqreturn_t owl_timer1_interrupt(int irq, void *dev_id) static const struct owl_timer_info s500_timer_info = { .timer_offset[0] = 0x08, .timer_offset[1] = 0x14, + .timer_offset[2] = -1, + .timer_offset[3] = -1, +}; + +static const struct owl_timer_info s900_timer_info = { + .timer_offset[0] = 0x08, + .timer_offset[1] = 0x14, + .timer_offset[2] = 0x30, + .timer_offset[3] = 0x3c, }; static const struct of_device_id owl_timer_of_matches[] = { { .compatible = "actions,s500-timer", .data = &s500_timer_info }, + { .compatible = "actions,s900-timer", .data = &s900_timer_info }, { } }; @@ -191,3 +202,4 @@ static int __init owl_timer_init(struct device_node *node) return 0; } CLOCKSOURCE_OF_DECLARE(owl_s500, "actions,s500-timer", owl_timer_init); +CLOCKSOURCE_OF_DECLARE(owl_s900, "actions,s900-timer", owl_timer_init);
The Actions Semi S900 SoC provides four 32-bit timers, TIMER0/1/2/3, but no 2Hz timers. Deal with the S500 having less timers. An S900 datasheet can be found in 96Boards documentation: https://github.com/96boards/documentation/blob/master/ConsumerEdition/Bubblegum-96/HardwareDocs/SoC_bubblegum96.pdf Signed-off-by: Andreas Färber <afaerber@suse.de> --- v3: new drivers/clocksource/owl-timer.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)