KVM: PPC: Book3S HV: Don't use ASDR for real-mode HPT faults on POWER9

Submitted by Paul Mackerras on Feb. 28, 2017, 4:57 a.m.

Details

Message ID 20170228045746.GA25371@fergus.ozlabs.ibm.com
State New
Headers show

Commit Message

Paul Mackerras Feb. 28, 2017, 4:57 a.m.
In HPT mode on POWER9, the ASDR register is supposed to record segment
information for hypervisor page faults.  It turns out that POWER9 DD1
does not record the page size information in the ASDR for faults in
guest real mode.  The effect is that guest code running in real mode
on POWER9 DD1 will get unexpected data/instruction storage interrupts
and most likely hang or crash.

We have the necessary information in memory already, so by moving the
checks for real mode that already existed, we can use the in-memory
copy.  Since a load is likely to be faster than reading an SPR, we do
this unconditionally (not just for POWER9 DD1).

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

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diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 8261d1f..ba65777 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1805,12 +1805,12 @@  kvmppc_hdsi:
 	/* HPTE not found fault or protection fault? */
 	andis.	r0, r6, (DSISR_NOHPTE | DSISR_PROTFAULT)@h
 	beq	1f			/* if not, send it to the guest */
+	andi.	r0, r11, MSR_DR		/* data relocation enabled? */
+	beq	3f
 BEGIN_FTR_SECTION
 	mfspr	r5, SPRN_ASDR		/* on POWER9, use ASDR to get VSID */
 	b	4f
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
-	andi.	r0, r11, MSR_DR		/* data relocation enabled? */
-	beq	3f
 	clrrdi	r0, r4, 28
 	PPC_SLBFEE_DOT(R5, R0)		/* if so, look up SLB */
 	li	r0, BOOK3S_INTERRUPT_DATA_SEGMENT
@@ -1897,12 +1897,12 @@  kvmppc_hisi:
 	bne	.Lradix_hisi		/* for radix, just save ASDR */
 	andis.	r0, r11, SRR1_ISI_NOPT@h
 	beq	1f
+	andi.	r0, r11, MSR_IR		/* instruction relocation enabled? */
+	beq	3f
 BEGIN_FTR_SECTION
 	mfspr	r5, SPRN_ASDR		/* on POWER9, use ASDR to get VSID */
 	b	4f
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
-	andi.	r0, r11, MSR_IR		/* instruction relocation enabled? */
-	beq	3f
 	clrrdi	r0, r10, 28
 	PPC_SLBFEE_DOT(R5, R0)		/* if so, look up SLB */
 	li	r0, BOOK3S_INTERRUPT_INST_SEGMENT