| Message ID | 20170227151436.18698-15-lorenzo.pieralisi@arm.com |
|---|---|
| State | Changes Requested |
| Headers | show |
diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c index e3e4fed..8042780 100644 --- a/drivers/pci/dwc/pcie-hisi.c +++ b/drivers/pci/dwc/pcie-hisi.c @@ -294,10 +294,9 @@ static int hisi_pcie_probe(struct platform_device *pdev) } reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbi"); - pci->dbi_base = devm_ioremap_resource(dev, reg); + pci->dbi_base = devm_pci_remap_cfg_resource(dev, reg); if (IS_ERR(pci->dbi_base)) return PTR_ERR(pci->dbi_base); - platform_set_drvdata(pdev, hisi_pcie); ret = hisi_add_pcie_port(hisi_pcie, pdev);
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com> Cc: Zhou Wang <wangzhou1@hisilicon.com> --- drivers/pci/dwc/pcie-hisi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)