From patchwork Fri Nov 26 15:34:36 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sukumar Ghorai X-Patchwork-Id: 73195 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from canuck.infradead.org (canuck.infradead.org [134.117.69.58]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A70F4B70DF for ; Sat, 27 Nov 2010 02:42:25 +1100 (EST) Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1PM0L2-0000hL-Tv; Fri, 26 Nov 2010 15:35:52 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by canuck.infradead.org with esmtps (Exim 4.72 #1 (Red Hat Linux)) id 1PM0Jy-0000b7-So; Fri, 26 Nov 2010 15:34:50 +0000 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id oAQFYhqs011691 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 26 Nov 2010 09:34:45 -0600 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id oAQFYbEm004866; Fri, 26 Nov 2010 21:04:41 +0530 (IST) From: Sukumar Ghorai To: linux-omap@vger.kernel.org Subject: [PATCH v6 6/7] omap: nand: ecc layout select from board file Date: Fri, 26 Nov 2010 21:04:36 +0530 Message-Id: <1290785677-16005-7-git-send-email-s-ghorai@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1290785677-16005-1-git-send-email-s-ghorai@ti.com> References: <1290785677-16005-1-git-send-email-s-ghorai@ti.com> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20101126_103447_243392_415C618F X-CRM114-Status: GOOD ( 15.23 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: Vimal Singh , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Sukumar Ghorai X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This patch makes it possible to select sw or hw (different layout options) ecc scheme supported by omap nand driver. And hw ecc layout selected for sdp and zoom boards, by default. Signed-off-by: Vimal Singh Signed-off-by: Sukumar Ghorai --- arch/arm/mach-omap2/board-flash.c | 1 + arch/arm/plat-omap/include/plat/gpmc.h | 7 +++++++ arch/arm/plat-omap/include/plat/nand.h | 2 ++ drivers/mtd/nand/omap2.c | 5 +---- 4 files changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c index 78abcd9..3340427 100644 --- a/arch/arm/mach-omap2/board-flash.c +++ b/arch/arm/mach-omap2/board-flash.c @@ -150,6 +150,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs) if (cpu_is_omap3630()) board_nand_data.devsize = 1; + board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DIFF_LAYOUT; board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs; gpmc_nand_init(&board_nand_data); } diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h index fb82335..ca6e8db 100644 --- a/arch/arm/plat-omap/include/plat/gpmc.h +++ b/arch/arm/plat-omap/include/plat/gpmc.h @@ -86,6 +86,13 @@ #define PREFETCH_FIFOTHRESHOLD_MAX 0x40 #define PREFETCH_FIFOTHRESHOLD(val) (val << 8) +enum omap_ecc { + OMAP_ECC_HAMMING_CODE_DIFF_LAYOUT = 0, + /* 1-bit s/w ecc and layout different from romcode */ + OMAP_ECC_HAMMING_CODE_HW,/* 1-bit ecc, romcode layout */ + OMAP_ECC_HAMMING_CODE_SW,/* 1-bit ecc, romcode layout */ +}; + /* * Note that all values in this struct are in nanoseconds, while * the register values are in gpmc_fck cycles. diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h index ae5e053..d86d1ec 100644 --- a/arch/arm/plat-omap/include/plat/nand.h +++ b/arch/arm/plat-omap/include/plat/nand.h @@ -8,6 +8,7 @@ * published by the Free Software Foundation. */ +#include #include enum nand_io { @@ -31,6 +32,7 @@ struct omap_nand_platform_data { enum nand_io xfer_type; unsigned long phys_base; int devsize; + enum omap_ecc ecc_opt; }; /* minimum size for IO mapping */ diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index fea9f59..0937001 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -7,6 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#define CONFIG_MTD_NAND_OMAP_HWECC #include #include @@ -618,8 +619,6 @@ static int omap_verify_buf(struct mtd_info *mtd, const u_char * buf, int len) return 0; } -#ifdef CONFIG_MTD_NAND_OMAP_HWECC - /** * gen_true_ecc - This function will generate true ECC value * @ecc_buf: buffer to store ecc code @@ -839,8 +838,6 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int mode) gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size); } -#endif - /** * omap_wait - wait until the command is done * @mtd: MTD device structure