From patchwork Fri Feb 24 05:41:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siarhei Volkau X-Patchwork-Id: 731911 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vV0Mr2TrLz9s7t for ; Fri, 24 Feb 2017 16:41:28 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="BcTkjKVP"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751127AbdBXFl2 (ORCPT ); Fri, 24 Feb 2017 00:41:28 -0500 Received: from mail-lf0-f68.google.com ([209.85.215.68]:33909 "EHLO mail-lf0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751080AbdBXFl1 (ORCPT ); Fri, 24 Feb 2017 00:41:27 -0500 Received: by mail-lf0-f68.google.com with SMTP id h67so749492lfg.1 for ; Thu, 23 Feb 2017 21:41:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nDTCbBwrkysxy9QqlrTudidFpe4J4ZfojudR6F51upI=; b=BcTkjKVP7tvwPI59TryOsyn9lVX+YIMmHI5jqVSwToJFC/F+dYYOAZ3HrylaRRqmbU +0b7aIlyxfPQzYbIWZA1p1S+4SnrjUHYqR/OJjqpmHfvJVChBrbTOqq5JqiBrngL9E9v CehIinG5O373kTN/prH9+0FArFohRvT7vRtEETC+mG6OfkE4OpyihSIHx7GyiC9Kga9G XN7q3cyG7XYYyVVA2wxGHS7lFmQPjAMp/XELnrLaYIlieY8bXT2f7D3XxXc1SFVJFtXw Cs1Yct35j48HzQ8I+TuzQTbHxoneJf5jHGisFsN/yLiLxogXy3Ft49Dh8yKAr4dDb+Zc /BuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nDTCbBwrkysxy9QqlrTudidFpe4J4ZfojudR6F51upI=; b=ZuhOPirtqHsLFCB2VXpT12274K7EVaD2p2uhMthcQOB4ZqI6Eo/dbPpA2najXc6eaA 8CDthZd32pbUGwH2rzYw7NLEQ139ARotdxW53UMg55u53ocY+TLrufEFxM3cW1YDsXXH 8iRLv/8y1hWbGXjPqAwow8Eu1ObIUkijfSLUawDbHjoAGwrjg/XzgGWtIHi4gCjhYibF WDDpXHVGYKbFJCN8RmdCohQM152OVY6LMYaYrRtIynX6mpCqY13bExRKanj97J6GK/Yv AJmeE6jhZF20dka44OBR5vYC26AUb/HeTBOZDSPoiK51eErYnLM6Rl7bDLo82jeawBNC N7mQ== X-Gm-Message-State: AMke39mavb6r5GeSYE6k4wVYfrDcr+VLKn1TaY3SOucOws05V3vkWQgbx0/NekB28tBOog== X-Received: by 10.46.9.134 with SMTP id 128mr187702ljj.133.1487914886060; Thu, 23 Feb 2017 21:41:26 -0800 (PST) Received: from hp-envy-1014.local (mm-118-67-212-37.vitebsk.dynamic.pppoe.byfly.by. [37.212.67.118]) by smtp.gmail.com with ESMTPSA id d77sm1764975lfd.26.2017.02.23.21.41.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Feb 2017 21:41:25 -0800 (PST) From: lis8215@gmail.com To: linux-sunxi@googlegroups.com Cc: thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux-pwm@vger.kernel.org, Siarhei Volkau Subject: [PATCH v4 6/9] pwm: sunxi: Increase max number of pwm channels. Date: Fri, 24 Feb 2017 08:41:13 +0300 Message-Id: <1487914876-8594-7-git-send-email-lis8215@gmail.com> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1487914876-8594-1-git-send-email-lis8215@gmail.com> References: <1487914876-8594-1-git-send-email-lis8215@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Siarhei Volkau sun6i have 4 pwm channels onboard. This patch increase maximal possible count of channels. Signed-off-by: Siarhei Volkau --- drivers/pwm/pwm-sun4i.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index 9463148..a179a53 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -46,7 +46,7 @@ #define BIT_CH(bit, chan) ((bit) << ((chan) * PWMCH_OFFSET)) -#define SUN4I_MAX_PWM_CHANNELS 2 +#define SUNXI_MAX_PWM_CHANNELS 4 /* regmap fields */ enum { @@ -91,14 +91,14 @@ struct sun4i_pwm_data { bool has_rdy; unsigned int npwm; const u32 *prescaler_table; - const struct sunxi_pwmch_data *chan_data[SUN4I_MAX_PWM_CHANNELS]; + const struct sunxi_pwmch_data *chan_data[SUNXI_MAX_PWM_CHANNELS]; }; struct sun4i_pwm_chip { struct pwm_chip chip; struct clk *clk; struct regmap *regmap; - struct regmap_field *fields[SUN4I_MAX_PWM_CHANNELS][NUM_FIELDS]; + struct regmap_field *fields[SUNXI_MAX_PWM_CHANNELS][NUM_FIELDS]; spinlock_t ctrl_lock; const struct sun4i_pwm_data *data; }; @@ -426,7 +426,7 @@ static int sunxi_alloc_reg_fields(struct device *dev, int i, err; const struct sunxi_pwmch_data *data = pwm->data->chan_data[chan]; - if (!data || chan >= SUN4I_MAX_PWM_CHANNELS) + if (!data || chan >= SUNXI_MAX_PWM_CHANNELS) return -EINVAL; for (i = 0; i < NUM_FIELDS; i++) { pwm->fields[chan][i] =