| Message ID | 8d7198bfc4cf9a4f9a9f135cacdedaecd7b29990.1487829585.git.sam.bobroff@au1.ibm.com |
|---|---|
| State | New |
| Headers | show |
On Thu, Feb 23, 2017 at 05:00:00PM +1100, Sam Bobroff wrote: > Query and cache the value of two new KVM capabilities that indicate > KVM's support for new radix and hash modes of the MMU. > > Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > v2: > > * cap_mmu_hash renamed to cap_mmu_hash_v3. > > target/ppc/kvm.c | 14 ++++++++++++++ > target/ppc/kvm_ppc.h | 12 ++++++++++++ > 2 files changed, 26 insertions(+) > > diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c > index cf62a42c1f..8b153808fd 100644 > --- a/target/ppc/kvm.c > +++ b/target/ppc/kvm.c > @@ -83,6 +83,8 @@ static int cap_papr; > static int cap_htab_fd; > static int cap_fixup_hcalls; > static int cap_htm; /* Hardware transactional memory support */ > +static int cap_mmu_radix; > +static int cap_mmu_hash_v3; > > static uint32_t debug_inst_opcode; > > @@ -136,6 +138,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s) > cap_htab_fd = kvm_check_extension(s, KVM_CAP_PPC_HTAB_FD); > cap_fixup_hcalls = kvm_check_extension(s, KVM_CAP_PPC_FIXUP_HCALL); > cap_htm = kvm_vm_check_extension(s, KVM_CAP_PPC_HTM); > + cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX); > + cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3); > > if (!cap_interrupt_level) { > fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the " > @@ -2430,6 +2434,16 @@ bool kvmppc_has_cap_htm(void) > return cap_htm; > } > > +bool kvmppc_has_cap_mmu_radix(void) > +{ > + return cap_mmu_radix; > +} > + > +bool kvmppc_has_cap_mmu_hash_v3(void) > +{ > + return cap_mmu_hash_v3; > +} > + > static PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc) > { > ObjectClass *oc = OBJECT_CLASS(pcc); > diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h > index 8da2ee418a..56e222dfc2 100644 > --- a/target/ppc/kvm_ppc.h > +++ b/target/ppc/kvm_ppc.h > @@ -56,6 +56,8 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index, > target_ulong pte0, target_ulong pte1); > bool kvmppc_has_cap_fixup_hcalls(void); > bool kvmppc_has_cap_htm(void); > +bool kvmppc_has_cap_mmu_radix(void); > +bool kvmppc_has_cap_mmu_hash_v3(void); > int kvmppc_enable_hwrng(void); > int kvmppc_put_books_sregs(PowerPCCPU *cpu); > PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); > @@ -262,6 +264,16 @@ static inline bool kvmppc_has_cap_htm(void) > return false; > } > > +static inline bool kvmppc_has_cap_mmu_radix(void) > +{ > + return false; > +} > + > +static inline bool kvmppc_has_cap_mmu_hash_v3(void) > +{ > + return false; > +} > + > static inline int kvmppc_enable_hwrng(void) > { > return -1;
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index cf62a42c1f..8b153808fd 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -83,6 +83,8 @@ static int cap_papr; static int cap_htab_fd; static int cap_fixup_hcalls; static int cap_htm; /* Hardware transactional memory support */ +static int cap_mmu_radix; +static int cap_mmu_hash_v3; static uint32_t debug_inst_opcode; @@ -136,6 +138,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_htab_fd = kvm_check_extension(s, KVM_CAP_PPC_HTAB_FD); cap_fixup_hcalls = kvm_check_extension(s, KVM_CAP_PPC_FIXUP_HCALL); cap_htm = kvm_vm_check_extension(s, KVM_CAP_PPC_HTM); + cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX); + cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3); if (!cap_interrupt_level) { fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the " @@ -2430,6 +2434,16 @@ bool kvmppc_has_cap_htm(void) return cap_htm; } +bool kvmppc_has_cap_mmu_radix(void) +{ + return cap_mmu_radix; +} + +bool kvmppc_has_cap_mmu_hash_v3(void) +{ + return cap_mmu_hash_v3; +} + static PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc) { ObjectClass *oc = OBJECT_CLASS(pcc); diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index 8da2ee418a..56e222dfc2 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -56,6 +56,8 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index, target_ulong pte0, target_ulong pte1); bool kvmppc_has_cap_fixup_hcalls(void); bool kvmppc_has_cap_htm(void); +bool kvmppc_has_cap_mmu_radix(void); +bool kvmppc_has_cap_mmu_hash_v3(void); int kvmppc_enable_hwrng(void); int kvmppc_put_books_sregs(PowerPCCPU *cpu); PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); @@ -262,6 +264,16 @@ static inline bool kvmppc_has_cap_htm(void) return false; } +static inline bool kvmppc_has_cap_mmu_radix(void) +{ + return false; +} + +static inline bool kvmppc_has_cap_mmu_hash_v3(void) +{ + return false; +} + static inline int kvmppc_enable_hwrng(void) { return -1;
Query and cache the value of two new KVM capabilities that indicate KVM's support for new radix and hash modes of the MMU. Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> --- v2: * cap_mmu_hash renamed to cap_mmu_hash_v3. target/ppc/kvm.c | 14 ++++++++++++++ target/ppc/kvm_ppc.h | 12 ++++++++++++ 2 files changed, 26 insertions(+)