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[www] sort branches

Message ID 58A1E77A.2090805@eagerm.com
State New
Headers show

Commit Message

Michael Eager Feb. 13, 2017, 5:06 p.m. UTC 
On 02/13/2017 06:34 AM, Nathan Sidwell wrote:
> I've applied this patch to sort the other branch lists in svn.html.  I also added an index and split
> the inactive branch list into merged and plain inactive.
>
> Attention branch maintainers:  Please check whether I've incorrectly put a merged branch on the
> inactive list.
>
> nathan

The microblaze branch has been merged into the gcc mainline.

    (<a 
href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf">link</a>).
@@ -790,6 +784,13 @@ be prefixed with the initials of the dis
    and is currently unmaintained.
    This work now continues on the autovect-branch.</dd>

+  <dt>microblaze</dt>
+  <dd>This branch contained support for updating the Xilinx MicroBlaze
+  architecture to gcc-4.1.2.
+  It was created by Michael Eager
+  &lt;<a href="mailto:eager@eagercon.com">eager@eagercon.com</a>&gt;.
+  All changes have been merged into mainline.</dd>
+
    <dt><a href="https://gcc.gnu.org/wiki/MemRef">mem-ref2</a></dt>
    <dt>mips-3_4-rewrite-branch</dt>
    <dt>named-addr-spaces-branch</dt>
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Patch

diff -urNp svn.html-orig svn.html
--- svn.html-orig       2017-02-13 09:00:36.000000000 -0800
+++ svn.html    2017-02-13 09:04:50.000000000 -0800
@@ -455,12 +455,6 @@  the command <code>svn log --stop-on-copy
    are Dwarakanath Rajagopal &lt;<a 
href="mailto:dwarak.rajagopal@amd.com">dwarak.rajagopal@amd.com</a>&gt;
    and H.J. Lu &lt;<a href="mailto:hjl.tools@gmail.com">hjl.tools@gmail.com</a>&gt;.</dd>

-  <dt>microblaze</dt>
-  <dd>This branch contains support for the Xilinx MicroBlaze architecture.
-  This branch will be used to update MicroBlaze support from gcc-4.1.2 to
-  to the head.  It is maintained by Michael Eager
-  &lt;<a href="mailto:eager@eagercon.com">eager@eagercon.com</a>&gt;.</dd>
-
    <dt>mpx</dt>
    <dd>The goal of this branch is to support Intel MPX technology