===================================================================
@@ -3516,7 +3516,7 @@ same as for the @option{-mcpu=} command-
@item sign-return-address
@cindex @code{sign-return-address} function attribute, AArch64
Select the function scope on which return address signing will be applied. The
-behaviour and permissible arguments are the same as for the command-line option
+behavior and permissible arguments are the same as for the command-line option
@option{-msign-return-address=}. The default value is @code{none}.
@end table
@@ -12657,7 +12657,7 @@ void __builtin_arm_set_fpscr (unsigned i
@subsection ARM ARMv8-M Security Extensions
GCC implements the ARMv8-M Security Extensions as described in the ARMv8-M
-Security Extensions: Requiremenets on Development Tools Engineering
+Security Extensions: Requirements on Development Tools Engineering
Specification, which can be found at
@uref{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
@@ -13993,7 +13993,7 @@ data elements. The following vectors ty
@item @code{v2f64}, a vector of two 64-bit doubles.
@end itemize
-Intructions and corresponding built-ins may have additional restrictions and/or
+Instructions and corresponding built-ins may have additional restrictions and/or
input/output values manipulated:
@itemize
@item @code{imm0_1}, an integer literal in range 0 to 1;
===================================================================
@@ -4309,7 +4309,7 @@ fallthrough comments, only attributes di
@end itemize
The comment needs to be followed after optional whitespace and other comments
-by @code{case} or @code{default} keywords or by a user label that preceeds some
+by @code{case} or @code{default} keywords or by a user label that precedes some
@code{case} or @code{default} label.
@smallexample
@@ -5145,7 +5145,7 @@ or where the result of the size computat
precision would exceed @code{SIZE_MAX / 2}. The option argument @var{n}
may end in one of the standard suffixes designating a multiple of bytes
such as @code{kB} and @code{KiB} for kilobyte and kibibyte, respectively,
-@code{MB} and @code{MiB} for magabyte and mebibyte, and so on.
+@code{MB} and @code{MiB} for megabyte and mebibyte, and so on.
@xref{Function Attributes}.
@item -Walloca
@@ -5935,7 +5935,7 @@ while} statement. This warning is also
@opindex Wenum-compare
@opindex Wno-enum-compare
Warn about a comparison between values of different enumerated types.
-In C++ enumeral mismatches in conditional expressions are also
+In C++ enumerated type mismatches in conditional expressions are also
diagnosed and the warning is enabled by default. In C this warning is
enabled by @option{-Wall}.
@@ -9685,7 +9685,7 @@ The default value is 40.
@item inline-min-speedup
When estimated performance improvement of caller + callee runtime exceeds this
-threshold (in precent), the function can be inlined regardless the limit on
+threshold (in percent), the function can be inlined regardless of the limit on
@option{--param max-inline-insns-single} and @option{--param
max-inline-insns-auto}.
@@ -10483,14 +10483,14 @@ E.g. to disable inline code use
@option{--param asan-instrumentation-with-call-threshold=0}.
@item use-after-scope-direct-emission-threshold
-If size of a local variables in bytes is smaller of equal to this number,
+If size of a local variable in bytes is smaller or equal to this number,
direct instruction emission is utilized to poison and unpoison local variables.
Default value in 256.
@item chkp-max-ctor-size
Static constructors generated by Pointer Bounds Checker may become very
large and significantly increase compile time at optimization level
-@option{-O1} and higher. This parameter is a maximum nubmer of statements
+@option{-O1} and higher. This parameter is a maximum number of statements
in a single generated constructor. Default value is 5000.
@item max-fsm-thread-path-insns
@@ -15707,7 +15707,7 @@ Alternatively, @code{func_4} can be defi
@cindex @code{RAMPZ}
Some AVR devices support memories larger than the 64@tie{}KiB range
that can be accessed with 16-bit pointers. To access memory locations
-outside this 64@tie{}KiB range, the contentent of a @code{RAMP}
+outside this 64@tie{}KiB range, the content of a @code{RAMP}
register is used as high part of the address:
The @code{X}, @code{Y}, @code{Z} address register is concatenated
with the @code{RAMPX}, @code{RAMPY}, @code{RAMPZ} special function