Message ID | 1290526609-11049-1-git-send-email-Joakim.Tjernlund@transmode.se |
---|---|
State | New |
Headers | show |
This patch is okay, but would you please make the order consistent in the first hunk so both are (reg == RS6000_PIC_OFFSET_TABLE_REGNUM && !TARGET_SINGLE_PIC_BASE Thanks, David On Tue, Nov 23, 2010 at 10:36 AM, Joakim Tjernlund <Joakim.Tjernlund@transmode.se> wrote: > Do not generate fPIC/fpic prologue nor save > and restore PIC register. > > Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> > > --- > > - Use Var instead of Mask and add some docs per > Michael Meissner <meissner@linux.vnet.ibm.com> > > gcc/config/rs6000/rs6000.c | 7 ++++++- > gcc/config/rs6000/rs6000.opt | 4 ++++ > gcc/doc/invoke.texi | 9 ++++++++- > 3 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 63f8ef9..bf5b5d3 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -16036,8 +16036,10 @@ rs6000_reg_live_or_pic_offset_p (int reg) > return ((df_regs_ever_live_p (reg) > && (!call_used_regs[reg] > || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM > - && TARGET_TOC && TARGET_MINIMAL_TOC))) > + && TARGET_TOC && TARGET_MINIMAL_TOC > + && !TARGET_SINGLE_PIC_BASE))) > || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM > + && !TARGET_SINGLE_PIC_BASE > && ((DEFAULT_ABI == ABI_V4 && flag_pic != 0) > || (DEFAULT_ABI == ABI_DARWIN && flag_pic)))); > } > @@ -16737,6 +16739,9 @@ rs6000_emit_prologue (void) > insn = emit_insn (generate_set_vrsave (reg, info, 0)); > } > > + if (TARGET_SINGLE_PIC_BASE) > + return; /* Do not set PIC register */ > + > /* If we are using RS6000_PIC_OFFSET_TABLE_REGNUM, we need to set it up. */ > if ((TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) > || (DEFAULT_ABI == ABI_V4 > diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt > index 8a62352..2adb6dd 100644 > --- a/gcc/config/rs6000/rs6000.opt > +++ b/gcc/config/rs6000/rs6000.opt > @@ -119,6 +119,10 @@ mupdate > Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) > Generate load/store with update instructions > > +msingle-pic-base > +Target Report Var(TARGET_SINGLE_PIC_BASE) Init(0) > +Do not load the PIC register in function prologues > + > mavoid-indexed-addresses > Target Report Var(TARGET_AVOID_XFORM) Init(-1) > Avoid generation of indexed load/store instructions when possible > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index 393e418..fc30537 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -728,7 +728,7 @@ See RS/6000 and PowerPC Options. > -mstrict-align -mno-strict-align -mrelocatable @gol > -mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol > -mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol > --mdynamic-no-pic -maltivec -mswdiv @gol > +-mdynamic-no-pic -maltivec -mswdiv -msingle-pic-base @gol > -mprioritize-restricted-insns=@var{priority} @gol > -msched-costly-dep=@var{dependence_type} @gol > -minsert-sched-nops=@var{scheme} @gol > @@ -14129,6 +14129,13 @@ relocatable, but that its external references are relocatable. The > resulting code is suitable for applications, but not shared > libraries. > > +@item -msingle-pic-base > +@opindex msingle-pic-base > +Treat the register used for PIC addressing as read-only, rather than > +loading it in the prologue for each function. The run-time system is > +responsible for initializing this register with an appropriate value > +before execution begins. > + > @item -mprioritize-restricted-insns=@var{priority} > @opindex mprioritize-restricted-insns > This option controls the priority that is assigned to > -- > 1.7.2.2 > >
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 63f8ef9..bf5b5d3 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -16036,8 +16036,10 @@ rs6000_reg_live_or_pic_offset_p (int reg) return ((df_regs_ever_live_p (reg) && (!call_used_regs[reg] || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM - && TARGET_TOC && TARGET_MINIMAL_TOC))) + && TARGET_TOC && TARGET_MINIMAL_TOC + && !TARGET_SINGLE_PIC_BASE))) || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM + && !TARGET_SINGLE_PIC_BASE && ((DEFAULT_ABI == ABI_V4 && flag_pic != 0) || (DEFAULT_ABI == ABI_DARWIN && flag_pic)))); } @@ -16737,6 +16739,9 @@ rs6000_emit_prologue (void) insn = emit_insn (generate_set_vrsave (reg, info, 0)); } + if (TARGET_SINGLE_PIC_BASE) + return; /* Do not set PIC register */ + /* If we are using RS6000_PIC_OFFSET_TABLE_REGNUM, we need to set it up. */ if ((TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) || (DEFAULT_ABI == ABI_V4 diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 8a62352..2adb6dd 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -119,6 +119,10 @@ mupdate Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Generate load/store with update instructions +msingle-pic-base +Target Report Var(TARGET_SINGLE_PIC_BASE) Init(0) +Do not load the PIC register in function prologues + mavoid-indexed-addresses Target Report Var(TARGET_AVOID_XFORM) Init(-1) Avoid generation of indexed load/store instructions when possible diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 393e418..fc30537 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -728,7 +728,7 @@ See RS/6000 and PowerPC Options. -mstrict-align -mno-strict-align -mrelocatable @gol -mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol -mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol --mdynamic-no-pic -maltivec -mswdiv @gol +-mdynamic-no-pic -maltivec -mswdiv -msingle-pic-base @gol -mprioritize-restricted-insns=@var{priority} @gol -msched-costly-dep=@var{dependence_type} @gol -minsert-sched-nops=@var{scheme} @gol @@ -14129,6 +14129,13 @@ relocatable, but that its external references are relocatable. The resulting code is suitable for applications, but not shared libraries. +@item -msingle-pic-base +@opindex msingle-pic-base +Treat the register used for PIC addressing as read-only, rather than +loading it in the prologue for each function. The run-time system is +responsible for initializing this register with an appropriate value +before execution begins. + @item -mprioritize-restricted-insns=@var{priority} @opindex mprioritize-restricted-insns This option controls the priority that is assigned to
Do not generate fPIC/fpic prologue nor save and restore PIC register. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> --- - Use Var instead of Mask and add some docs per Michael Meissner <meissner@linux.vnet.ibm.com> gcc/config/rs6000/rs6000.c | 7 ++++++- gcc/config/rs6000/rs6000.opt | 4 ++++ gcc/doc/invoke.texi | 9 ++++++++- 3 files changed, 18 insertions(+), 2 deletions(-)