From patchwork Tue Nov 23 13:32:06 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 72653 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2100DB70F1 for ; Wed, 24 Nov 2010 00:32:27 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B823E28197; Tue, 23 Nov 2010 14:32:20 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DdXA2V8Q9YhV; Tue, 23 Nov 2010 14:32:20 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 16A3B28148; Tue, 23 Nov 2010 14:32:18 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0D40628148 for ; Tue, 23 Nov 2010 14:32:16 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bn9LTbcxJwhp for ; Tue, 23 Nov 2010 14:32:14 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo-p05-ob.rzone.de (mo-p05-ob.rzone.de [81.169.146.181]) by theia.denx.de (Postfix) with ESMTPS id 06C1128128 for ; Tue, 23 Nov 2010 14:32:12 +0100 (CET) X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohavlCkce+Ub5QXMSOpHp3KJg5Kr1tMw== X-RZG-CLASS-ID: mo05 Received: from quad.fritz.box (p57BD4AA1.dip.t-dialin.net [87.189.74.161]) by post.strato.de (klopstock mo51) (RZmta 24.6) with ESMTP id a00ceamANCF3SX ; Tue, 23 Nov 2010 14:32:08 +0100 (MET) From: Stefan Roese To: u-boot@lists.denx.de Date: Tue, 23 Nov 2010 14:32:06 +0100 Message-Id: <1290519126-6391-1-git-send-email-sr@denx.de> X-Mailer: git-send-email 1.7.3.2 Subject: [U-Boot] [PATCH] ppc4xx: Fix build problems of IBM DDR2 NAND booting targets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This change is needed to compile the PPC4xx NAND booting targets equipped with the IBM DDR2 SDRAM controller. Signed-off-by: Stefan Roese Cc: Wolfgang Denk --- Wolfgang, this patch is needed to build the 44x NAND booting targets. Its based on top of your patchset "[PATCH 0/7] Address partial linking issues". How should we best handle these patches to make this git bisectable? Feel free to squash this patch into your patches to make this easier. Thanks, Stefan arch/powerpc/cpu/ppc4xx/Makefile | 2 +- board/amcc/canyonlands/canyonlands.c | 12 ------------ 2 files changed, 1 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile index 93ebf89..d97ca20 100644 --- a/arch/powerpc/cpu/ppc4xx/Makefile +++ b/arch/powerpc/cpu/ppc4xx/Makefile @@ -37,9 +37,9 @@ COBJS := 40x_spd_sdram.o ifndef CONFIG_NAND_SPL ifndef CONFIG_NAND_U_BOOT COBJS += 44x_spd_ddr.o -COBJS-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o endif endif +COBJS-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o COBJS-$(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) += 4xx_ibm_ddr2_autocalib.o COBJS += 4xx_pci.o COBJS += 4xx_pcie.o diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index faa3720..80e2739 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -363,18 +363,6 @@ int checkboard(void) } #endif /* !defined(CONFIG_ARCHES) */ -#if defined(CONFIG_NAND_U_BOOT) -/* - * NAND booting U-Boot version uses a fixed initialization, since the whole - * I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot - * code. - */ -phys_size_t initdram(int board_type) -{ - return CONFIG_SYS_MBYTES_SDRAM << 20; -} -#endif - #if defined(CONFIG_PCI) int board_pcie_first(void) {