[PR,target/79295,7,regression] fix ppc bcdadd insn pattern
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Message ID 1486699748.30084.21.camel@linux.vnet.ibm.com
State New
Headers show

Commit Message

Aaron Sawdey Feb. 10, 2017, 4:09 a.m. UTC
The bcdadd pattern has the wrong constraints. The change Meissner
supplied in PR79295 fixes the issue.

Successfully bootstrapped on ppc64le, ok for trunk if regtest also
passes?

2017-02-09  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

	PR target/79295
	* config/rs6000/altivec.md (bcd<bcd_add_sub>): Fix constraints.

Comments

Segher Boessenkool Feb. 10, 2017, 4:23 p.m. UTC | #1
On Thu, Feb 09, 2017 at 10:09:08PM -0600, Aaron Sawdey wrote:
> The bcdadd pattern has the wrong constraints. The change Meissner
> supplied in PR79295 fixes the issue.
> 
> Successfully bootstrapped on ppc64le, ok for trunk if regtest also
> passes?

Yes please.  Thanks,


Segher


> 2017-02-09  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
> 
> 	PR target/79295
> 	* config/rs6000/altivec.md (bcd<bcd_add_sub>): Fix constraints.

Patch
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Index: gcc/config/rs6000/altivec.md
===================================================================
--- gcc/config/rs6000/altivec.md	(revision 245221)
+++ gcc/config/rs6000/altivec.md	(working copy)
@@ -3710,10 +3710,10 @@ 
 (define_code_iterator BCD_TEST [eq lt gt unordered])
 
 (define_insn "bcd<bcd_add_sub>"
-  [(set (match_operand:V1TI 0 "register_operand" "")
-	(unspec:V1TI [(match_operand:V1TI 1 "register_operand" "")
-		      (match_operand:V1TI 2 "register_operand" "")
-		      (match_operand:QI 3 "const_0_to_1_operand" "")]
+  [(set (match_operand:V1TI 0 "gpc_reg_operand" "=v")
+	(unspec:V1TI [(match_operand:V1TI 1 "gpc_reg_operand" "v")
+		      (match_operand:V1TI 2 "gpc_reg_operand" "v")
+		      (match_operand:QI 3 "const_0_to_1_operand" "n")]
 		     UNSPEC_BCD_ADD_SUB))
    (clobber (reg:CCFP CR6_REGNO))]
   "TARGET_P8_VECTOR"