From patchwork Thu Feb 9 16:56:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vineet Gupta X-Patchwork-Id: 726218 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vK44j6LTwz9s3v for ; Fri, 10 Feb 2017 03:57:25 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="XwGh2E9U"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=6/il7KNZdCAIKJb0kkj2nJSHNusYIeLH3UX6VZv0w+Q=; b=XwGh2E9U3hkwNg jz3/sT8dNvbV8Pv94bjr94hhQ5sgb6itj+Jq1PFK24KqlmQ3L+PyjMN9iHPGdhbEM7yXcT1xaGmbk 3bYrR+/vMYG+vTKvDacmvilZzgkZbKkPQ4EzQxK1zih+FVJoDX0YO4YmlN9pFyFKo49LQAgRUSksM hYKFcPMsyhsmHFdMSsHMX49Fh2DJ3uiVQX5CumhJV2mzngp2rnRySJyqavIi+ybHzMrbO6lpRa2oP L7ouwDEuePKVPd5fshVlbueOmhYRIhGVXlnRJs9m9A7vwbuq49Pg8bi8Eai/U8+PhfKKO1/aIIeHq 1PbcAoEFxIc9OOe2VoqA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cbs28-0008Nu-Da; Thu, 09 Feb 2017 16:57:24 +0000 Received: from us01smtprelay-2.synopsys.com ([198.182.60.111] helo=smtprelay.synopsys.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cbs23-0008KY-Tg for linux-snps-arc@lists.infradead.org; Thu, 09 Feb 2017 16:57:22 +0000 Received: from mailhost.synopsys.com (mailhost1.synopsys.com [10.12.238.239]) by smtprelay.synopsys.com (Postfix) with ESMTP id 2D4A410C150F; Thu, 9 Feb 2017 08:56:59 -0800 (PST) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 06BE77EE; Thu, 9 Feb 2017 08:56:59 -0800 (PST) Received: from US01WXQAHTC1.internal.synopsys.com (us01wxqahtc1.internal.synopsys.com [10.12.238.230]) by mailhost.synopsys.com (Postfix) with ESMTP id E70277EB; Thu, 9 Feb 2017 08:56:58 -0800 (PST) Received: from IN01WEHTCA.internal.synopsys.com (10.144.199.104) by US01WXQAHTC1.internal.synopsys.com (10.12.238.230) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 9 Feb 2017 08:56:58 -0800 Received: from IN01WEHTCB.internal.synopsys.com (10.144.199.105) by IN01WEHTCA.internal.synopsys.com (10.144.199.103) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 9 Feb 2017 22:26:55 +0530 Received: from vineetg-Latitude-E7450.internal.synopsys.com (10.10.161.65) by IN01WEHTCB.internal.synopsys.com (10.144.199.243) with Microsoft SMTP Server (TLS) id 14.3.266.1; Thu, 9 Feb 2017 22:26:55 +0530 From: Vineet Gupta To: Subject: [PATCH] [ARC] Handle aux registers differences on ARC700 vs. HS38 cpus Date: Thu, 9 Feb 2017 08:56:42 -0800 Message-ID: <1486659402-6670-1-git-send-email-vgupta@synopsys.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.10.161.65] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170209_085720_054156_BBEC67F3 X-CRM114-Status: UNSURE ( 5.90 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [198.182.60.111 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [198.182.60.111 listed in wl.mailspike.net] -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vineet Gupta , linux-snps-arc@lists.infradead.org, Claudiu Zissulescu Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org opcodes/ 2017-02-09 Vineet Gupta * arc-regs.h: Distinguish some of the registers different on ARC700 and HS38 cpus. gas/ 2017-02-09 Vineet Gupta * testsuite/gas/arc/st.d: Update for 0xe having a name now Signed-off-by: Vineet Gupta --- gas/ChangeLog | 4 ++++ gas/testsuite/gas/arc/st.d | 2 +- opcodes/ChangeLog | 5 +++++ opcodes/arc-regs.h | 48 ++++++++++++++++++++++++++++++++++------------ 4 files changed, 46 insertions(+), 13 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index d96516f93b57..3a4c2ce496ce 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2017-02-09 Vineet Gupta + + * testsuite/gas/arc/st.d: Update for 0xe having a name now + 2017-02-02 Maciej W. Rozycki * doc/as.texinfo (Overview): Select MIPS options for man page diff --git a/gas/testsuite/gas/arc/st.d b/gas/testsuite/gas/arc/st.d index 3f75d40c367f..6fe5b88aefa1 100644 --- a/gas/testsuite/gas/arc/st.d +++ b/gas/testsuite/gas/arc/st.d @@ -22,7 +22,7 @@ Disassembly of section .text: 38: 1c04 1f80 0000 0000 st 0,\[r12,4\] 3c: R_ARC_32_ME .text\+0x40 40: 212b 0080 sr r1,\[r2\] - 44: 216b 0380 sr r1,\[0xe\] + 44: 216b 0380 sr r1,\[aux_irq_ctrl\] 48: 262b 7040 0000 03e8 sr 0x3e8,\[r1\] 50: 262b 7080 0000 0064 sr 0x64,\[r2\] 58: 212b 0f80 0000 2710 sr r1,\[0x2710\] diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 2185484ecec5..68ef4610240c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2017-02-09 Vineet Gupta + + * arc-regs.h: Distinguish some of the registers different on + ARC700 and HS38 cpus. + 2017-02-03 Nick Clifton PR 21096 diff --git a/opcodes/arc-regs.h b/opcodes/arc-regs.h index ae1f4c66f66f..0bdbd92a949c 100644 --- a/opcodes/arc-regs.h +++ b/opcodes/arc-regs.h @@ -19,8 +19,10 @@ along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ -DEF (0x0, ARC_OPCODE_ARCALL, NONE, status) -DEF (0x1, ARC_OPCODE_ARCALL, NONE, semaphore) +DEF (0x0, ARC_OPCODE_ARC600, NONE, status) +DEF (0x0, ARC_OPCODE_ARC700, NONE, status) +DEF (0x1, ARC_OPCODE_ARC600, NONE, semaphore) +DEF (0x1, ARC_OPCODE_ARC700, NONE, semaphore) DEF (0x2, ARC_OPCODE_ARCALL, NONE, lp_start) DEF (0x3, ARC_OPCODE_ARCALL, NONE, lp_end) DEF (0x4, ARC_OPCODE_ARCALL, NONE, identity) @@ -30,8 +32,16 @@ DEF (0x7, ARC_OPCODE_ARCALL, NONE, adcr) DEF (0x8, ARC_OPCODE_ARCALL, NONE, apcr) DEF (0x9, ARC_OPCODE_ARCALL, NONE, acr) DEF (0xa, ARC_OPCODE_ARCALL, NONE, status32) -DEF (0xb, ARC_OPCODE_ARCALL, NONE, status32_l1) -DEF (0xc, ARC_OPCODE_ARCALL, NONE, status32_l2) +DEF (0xb, ARC_OPCODE_ARC600, NONE, status32_l1) +DEF (0xb, ARC_OPCODE_ARC700, NONE, status32_l1) +DEF (0xb, ARC_OPCODE_ARCv2EM, NONE, status32_p0) +DEF (0xb, ARC_OPCODE_ARCv2HS, NONE, status32_p0) +DEF (0xc, ARC_OPCODE_ARC600, NONE, status32_l2) +DEF (0xc, ARC_OPCODE_ARC700, NONE, status32_l2) +DEF (0xd, ARC_OPCODE_ARCv2EM, NONE, aux_user_sp) +DEF (0xd, ARC_OPCODE_ARCv2HS, NONE, aux_user_sp) +DEF (0xe, ARC_OPCODE_ARCv2EM, NONE, aux_irq_ctrl) +DEF (0xe, ARC_OPCODE_ARCv2HS, NONE, aux_irq_ctrl) DEF (0xf, ARC_OPCODE_ARCALL, NONE, bpu_flush) DEF (0x10, ARC_OPCODE_ARCALL, NONE, ivic) DEF (0x10, ARC_OPCODE_ARCALL, NONE, ic_ivic) @@ -87,7 +97,10 @@ DEF (0x3d, ARC_OPCODE_NONE, NONE, burstval) DEF (0x40, ARC_OPCODE_ARCALL, NONE, xtp_newval) DEF (0x41, ARC_OPCODE_ARCALL, NONE, aux_macmode) DEF (0x42, ARC_OPCODE_ARCALL, NONE, lsp_newval) -DEF (0x43, ARC_OPCODE_ARCALL, NONE, aux_irq_lv12) +DEF (0x43, ARC_OPCODE_ARC600, NONE, aux_irq_lv12) +DEF (0x43, ARC_OPCODE_ARC700, NONE, aux_irq_lv12) +DEF (0x43, ARC_OPCODE_ARCv2EM, NONE, aux_irq_act) +DEF (0x43, ARC_OPCODE_ARCv2HS, NONE, aux_irq_act) DEF (0x44, ARC_OPCODE_ARCALL, NONE, aux_xmac0) DEF (0x45, ARC_OPCODE_ARCALL, NONE, aux_xmac1) DEF (0x46, ARC_OPCODE_ARCALL, NONE, aux_xmac2) @@ -204,9 +217,14 @@ DEF (0x102, ARC_OPCODE_ARCALL, NONE, limit1) DEF (0x103, ARC_OPCODE_ARCALL, NONE, timer_xx) DEF (0x120, ARC_OPCODE_ARCALL, NONE, arcangel_periph_xx) DEF (0x140, ARC_OPCODE_ARCALL, NONE, periph_xx) -DEF (0x200, ARC_OPCODE_ARCALL, NONE, aux_irq_lev) +DEF (0x200, ARC_OPCODE_ARC600, NONE, aux_irq_lev) +DEF (0x200, ARC_OPCODE_ARC700, NONE, aux_irq_lev) +DEF (0x200, ARC_OPCODE_ARCv2EM, NONE, irq_priority_pending) +DEF (0x200, ARC_OPCODE_ARCv2HS, NONE, irq_priority_pending) DEF (0x201, ARC_OPCODE_ARCALL, NONE, aux_irq_hint) DEF (0x202, ARC_OPCODE_ARCALL, NONE, aux_inter_core_interrupt) +DEF (0x206, ARC_OPCODE_ARCv2EM, NONE, irq_priority) +DEF (0x206, ARC_OPCODE_ARCv2HS, NONE, irq_priority) DEF (0x210, ARC_OPCODE_ARCALL, NONE, aes_aux_0) DEF (0x211, ARC_OPCODE_ARCALL, NONE, aes_aux_1) DEF (0x212, ARC_OPCODE_ARCALL, NONE, aes_aux_2) @@ -263,11 +281,11 @@ DEF (0x401, ARC_OPCODE_ARCALL, NONE, erbta) DEF (0x402, ARC_OPCODE_ARCALL, NONE, erstatus) DEF (0x403, ARC_OPCODE_ARCALL, NONE, ecr) DEF (0x404, ARC_OPCODE_ARCALL, NONE, efa) -DEF (0x405, ARC_OPCODE_ARCALL, NONE, tlbpd0) -DEF (0x406, ARC_OPCODE_ARCALL, NONE, tlbpd1) -DEF (0x407, ARC_OPCODE_ARCALL, NONE, tlbindex) -DEF (0x408, ARC_OPCODE_ARCALL, NONE, tlbcommand) -DEF (0x409, ARC_OPCODE_ARCALL, NONE, pid) +DEF (0x405, ARC_OPCODE_ARC700, NONE, tlbpd0) +DEF (0x406, ARC_OPCODE_ARC700, NONE, tlbpd1) +DEF (0x407, ARC_OPCODE_ARC700, NONE, tlbindex) +DEF (0x408, ARC_OPCODE_ARC700, NONE, tlbcommand) +DEF (0x409, ARC_OPCODE_ARC700, NONE, pid) DEF (0x409, ARC_OPCODE_ARCALL, NONE, mpuen) DEF (0x40a, ARC_OPCODE_ARCALL, NONE, icause1) DEF (0x40b, ARC_OPCODE_ARCALL, NONE, icause2) @@ -279,7 +297,7 @@ DEF (0x413, ARC_OPCODE_ARCALL, NONE, bta_l1) DEF (0x414, ARC_OPCODE_ARCALL, NONE, bta_l2) DEF (0x415, ARC_OPCODE_ARCALL, NONE, aux_irq_pulse_cancel) DEF (0x416, ARC_OPCODE_ARCALL, NONE, aux_irq_pending) -DEF (0x418, ARC_OPCODE_ARCALL, NONE, scratch_data0) +DEF (0x418, ARC_OPCODE_ARC700, NONE, scratch_data0) DEF (0x420, ARC_OPCODE_ARCALL, NONE, mpuic) DEF (0x421, ARC_OPCODE_ARCALL, NONE, mpufa) DEF (0x422, ARC_OPCODE_ARCALL, NONE, mpurdb0) @@ -319,6 +337,12 @@ DEF (0x450, ARC_OPCODE_ARCALL, NONE, pm_status) DEF (0x451, ARC_OPCODE_ARCALL, NONE, wake) DEF (0x452, ARC_OPCODE_ARCALL, NONE, dvfs_performance) DEF (0x453, ARC_OPCODE_ARCALL, NONE, pwr_ctrl) +DEF (0x460, ARC_OPCODE_ARCv2HS, NONE, tlbpd0) +DEF (0x461, ARC_OPCODE_ARCv2HS, NONE, tlbpd1) +DEF (0x463, ARC_OPCODE_ARCv2HS, NONE, tlbindex) +DEF (0x464, ARC_OPCODE_ARCv2HS, NONE, tlbcommand) +DEF (0x468, ARC_OPCODE_ARCv2HS, NONE, pid) +DEF (0x46c, ARC_OPCODE_ARCv2HS, NONE, scratch_data0) DEF (0x500, ARC_OPCODE_ARCALL, NONE, aux_vlc_buf_idx) DEF (0x501, ARC_OPCODE_ARCALL, NONE, aux_vlc_read_buf) DEF (0x502, ARC_OPCODE_ARCALL, NONE, aux_vlc_valid_bits)