| Message ID | 20170209045154.16868-21-rth@twiddle.net |
|---|---|
| State | New |
| Headers | show |
On 02/09/2017 01:51 AM, Richard Henderson wrote: > This allows the tcg optimizer to see, and fold, all of the > constants involved in a GOT base register load sequence. > > Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/openrisc/translate.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c > index 66064e1..cda84b6 100644 > --- a/target/openrisc/translate.c > +++ b/target/openrisc/translate.c > @@ -198,7 +198,11 @@ static void gen_jump(DisasContext *dc, int32_t n26, uint32_t reg, uint32_t op0) > tcg_gen_movi_tl(jmp_pc, tmp_pc); > break; > case 0x01: /* l.jal */ > - tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8)); > + tcg_gen_movi_tl(cpu_R[9], dc->pc + 8); > + /* Optimize jal being used to load the PC for PIC. */ > + if (tmp_pc == dc->pc + 8) { > + return; > + } > tcg_gen_movi_tl(jmp_pc, tmp_pc); > break; > case 0x03: /* l.bnf */ >
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 66064e1..cda84b6 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -198,7 +198,11 @@ static void gen_jump(DisasContext *dc, int32_t n26, uint32_t reg, uint32_t op0) tcg_gen_movi_tl(jmp_pc, tmp_pc); break; case 0x01: /* l.jal */ - tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8)); + tcg_gen_movi_tl(cpu_R[9], dc->pc + 8); + /* Optimize jal being used to load the PC for PIC. */ + if (tmp_pc == dc->pc + 8) { + return; + } tcg_gen_movi_tl(jmp_pc, tmp_pc); break; case 0x03: /* l.bnf */
This allows the tcg optimizer to see, and fold, all of the constants involved in a GOT base register load sequence. Signed-off-by: Richard Henderson <rth@twiddle.net> --- target/openrisc/translate.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)