From patchwork Mon Nov 22 21:47:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haiying Wang X-Patchwork-Id: 72595 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6E131B70F9 for ; Tue, 23 Nov 2010 08:46:58 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A82F5281B9; Mon, 22 Nov 2010 22:46:52 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HddT7K4d0WHg; Mon, 22 Nov 2010 22:46:52 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B2453281BE; Mon, 22 Nov 2010 22:46:42 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4E20E281AF for ; Mon, 22 Nov 2010 22:46:40 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id W2FTsUjO67gB for ; Mon, 22 Nov 2010 22:46:40 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from VA3EHSOBE005.bigfish.com (va3ehsobe005.messaging.microsoft.com [216.32.180.31]) by theia.denx.de (Postfix) with ESMTPS id 31CA4281B5 for ; Mon, 22 Nov 2010 22:46:36 +0100 (CET) Received: from mail98-va3-R.bigfish.com (10.7.14.244) by VA3EHSOBE005.bigfish.com (10.7.40.25) with Microsoft SMTP Server id 14.1.225.8; Mon, 22 Nov 2010 21:46:35 +0000 Received: from mail98-va3 (localhost.localdomain [127.0.0.1]) by mail98-va3-R.bigfish.com (Postfix) with ESMTP id 7A9EF40120 for ; Mon, 22 Nov 2010 21:42:37 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h67dh685h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:az33egw01.freescale.net; RD:az33egw01.freescale.net; EFVD:NLI Received: from mail98-va3 (localhost.localdomain [127.0.0.1]) by mail98-va3 (MessageSwitch) id 129046215617904_21480; Mon, 22 Nov 2010 21:42:36 +0000 (UTC) Received: from VA3EHSMHS020.bigfish.com (unknown [10.7.14.245]) by mail98-va3.bigfish.com (Postfix) with ESMTP id 01A8520004D for ; Mon, 22 Nov 2010 21:42:36 +0000 (UTC) Received: from az33egw01.freescale.net (192.88.158.102) by VA3EHSMHS020.bigfish.com (10.7.99.30) with Microsoft SMTP Server (TLS) id 14.1.225.8; Mon, 22 Nov 2010 21:46:30 +0000 Received: from de01smr02.am.mot.com (de01smr02.freescale.net [10.208.0.151]) by az33egw01.freescale.net (8.14.3/8.14.3) with ESMTP id oAMLkJ4J027435 for ; Mon, 22 Nov 2010 14:46:29 -0700 (MST) Received: from haiying-laptop.am.freescale.net (haiying-laptop.am.freescale.net [10.29.200.208]) by de01smr02.am.mot.com (8.13.1/8.13.0) with ESMTP id oAMM3xRF007265; Mon, 22 Nov 2010 16:04:00 -0600 (CST) From: To: Date: Mon, 22 Nov 2010 16:47:20 -0500 Message-ID: <1290462446-1459-1-git-send-email-Haiying.Wang@freescale.com> X-Mailer: git-send-email 1.7.3.1.50.g1e633 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH 1/7] powerpc/85xx: do not reloc l2srbar if CONFIG_FLASH_BASE is not defined X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Haiying Wang This fixes the compiling error for the board which doesn't have NOR flash (so CONFIG_FLASH_BASE is not defined) Signed-off-by: Haiying Wang --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 27236a0..4b8faa5 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -327,7 +327,7 @@ int cpu_init_r(void) if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { puts("already enabled"); l2srbar = l2cache->l2srbar0; -#ifdef CONFIG_SYS_INIT_L2_ADDR +#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE && l2srbar >= CONFIG_SYS_FLASH_BASE) { l2srbar = CONFIG_SYS_INIT_L2_ADDR;