| Message ID | 1486456099-7345-6-git-send-email-peterx@redhat.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Feb 07, 2017 at 04:28:07PM +0800, Peter Xu wrote: > Now we have a standalone memory region for MSI, all the irq region > requests should be redirected there. Cleaning up the block with an > assertion instead. > > Reviewed-by: Jason Wang <jasowang@redhat.com> > Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > hw/i386/intel_iommu.c | 28 ++++++---------------------- > 1 file changed, 6 insertions(+), 22 deletions(-) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index 50251c3..86d19bb 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -818,28 +818,12 @@ static void vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, > bool writes = true; > VTDIOTLBEntry *iotlb_entry; > > - /* Check if the request is in interrupt address range */ > - if (vtd_is_interrupt_addr(addr)) { > - if (is_write) { > - /* FIXME: since we don't know the length of the access here, we > - * treat Non-DWORD length write requests without PASID as > - * interrupt requests, too. Withoud interrupt remapping support, > - * we just use 1:1 mapping. > - */ > - VTD_DPRINTF(MMU, "write request to interrupt address " > - "gpa 0x%"PRIx64, addr); > - entry->iova = addr & VTD_PAGE_MASK_4K; > - entry->translated_addr = addr & VTD_PAGE_MASK_4K; > - entry->addr_mask = ~VTD_PAGE_MASK_4K; > - entry->perm = IOMMU_WO; > - return; > - } else { > - VTD_DPRINTF(GENERAL, "error: read request from interrupt address " > - "gpa 0x%"PRIx64, addr); > - vtd_report_dmar_fault(s, source_id, addr, VTD_FR_READ, is_write); > - return; > - } > - } > + /* > + * We have standalone memory region for interrupt addresses, we > + * should never receive translation requests in this region. > + */ > + assert(!vtd_is_interrupt_addr(addr)); > + > /* Try to fetch slpte form IOTLB */ > iotlb_entry = vtd_lookup_iotlb(s, source_id, addr); > if (iotlb_entry) {
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 50251c3..86d19bb 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -818,28 +818,12 @@ static void vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, bool writes = true; VTDIOTLBEntry *iotlb_entry; - /* Check if the request is in interrupt address range */ - if (vtd_is_interrupt_addr(addr)) { - if (is_write) { - /* FIXME: since we don't know the length of the access here, we - * treat Non-DWORD length write requests without PASID as - * interrupt requests, too. Withoud interrupt remapping support, - * we just use 1:1 mapping. - */ - VTD_DPRINTF(MMU, "write request to interrupt address " - "gpa 0x%"PRIx64, addr); - entry->iova = addr & VTD_PAGE_MASK_4K; - entry->translated_addr = addr & VTD_PAGE_MASK_4K; - entry->addr_mask = ~VTD_PAGE_MASK_4K; - entry->perm = IOMMU_WO; - return; - } else { - VTD_DPRINTF(GENERAL, "error: read request from interrupt address " - "gpa 0x%"PRIx64, addr); - vtd_report_dmar_fault(s, source_id, addr, VTD_FR_READ, is_write); - return; - } - } + /* + * We have standalone memory region for interrupt addresses, we + * should never receive translation requests in this region. + */ + assert(!vtd_is_interrupt_addr(addr)); + /* Try to fetch slpte form IOTLB */ iotlb_entry = vtd_lookup_iotlb(s, source_id, addr); if (iotlb_entry) {