From patchwork Fri Nov 19 22:35:07 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Denk X-Patchwork-Id: 72323 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5C37B1007D2 for ; Sat, 20 Nov 2010 09:35:21 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8E29E282EC; Fri, 19 Nov 2010 23:35:18 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id g+Dnw2Ki9wnY; Fri, 19 Nov 2010 23:35:18 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A80AD282DD; Fri, 19 Nov 2010 23:35:16 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1F0FB282DD for ; Fri, 19 Nov 2010 23:35:14 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id A0OxC7eyzFNK for ; Fri, 19 Nov 2010 23:35:12 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTP id 0655F282D4 for ; Fri, 19 Nov 2010 23:35:08 +0100 (CET) Received: from frontend1.mail.m-online.net (unknown [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 52A4C1C0F57C; Fri, 19 Nov 2010 23:35:08 +0100 (CET) X-Auth-Info: nNqIdhNydOX8fuPyZhAeC7cUrCJl40qAXJyzkQk/oEo= Received: from diddl.denx.de (ppp-93-104-38-247.dynamic.mnet-online.de [93.104.38.247]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 2CE541C027C7; Fri, 19 Nov 2010 23:35:08 +0100 (CET) Received: from gemini.denx.de (unknown [10.0.0.2]) by diddl.denx.de (Postfix) with ESMTP id ED1E93335217; Fri, 19 Nov 2010 23:35:07 +0100 (CET) Received: from gemini.denx.de (localhost.localdomain [127.0.0.1]) by gemini.denx.de (Postfix) with ESMTP id B949A14E648; Fri, 19 Nov 2010 23:35:07 +0100 (CET) To: "Paulraj, Sandeep" From: Wolfgang Denk MIME-Version: 1.0 In-reply-to: <0554BEF07D437848AF01B9C9B5F0BC5DBD1C11AD@dlee01.ent.ti.com> References: <0554BEF07D437848AF01B9C9B5F0BC5DBD1C11AD@dlee01.ent.ti.com> Comments: In-reply-to "Paulraj, Sandeep" message dated "Fri, 19 Nov 2010 15:56:36 -0600." Date: Fri, 19 Nov 2010 23:35:07 +0100 Message-Id: <20101119223507.B949A14E648@gemini.denx.de> Cc: "u-boot@lists.denx.de" , Steve Sakoman , Siarhei Siamashka Subject: Re: [U-Boot] OMAP3 patch to improve performance? X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Dear Sandeep, In message <0554BEF07D437848AF01B9C9B5F0BC5DBD1C11AD@dlee01.ent.ti.com> you wrote: > I came across this patch that might be useful > > http://lists.denx.de/pipermail/u-boot/2010-February/067534.html > > In any case since the u-boot structure has changed this cannot be > applied. If anybody is interested please send a new patch. That's actually prtty straightforward. Here it comes (completely untested :-) ---------------------------------------------------------------------- From 0223e42a48417ad18276d2709206b404c8796807 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sat, 6 Feb 2010 16:19:46 +0000 Subject: [PATCH] OMAP3: remove useless ASA bit from AUXCR Setting ASA bit hurts performance for the code which has lots of I-cache misses and there are no Cortex-A8 errata workarounds which would require to have it. A test program which intentionally stresses I-cache misses on conditional branches is attached. ASA bit is not set: real 0m2.940s user 0m2.930s sys 0m0.008s ASA bit is set: real 0m3.470s user 0m3.461s sys 0m0.008s The difference on some real applications is much more modest and is just something like ~0.5%, but every little bit helps. /**** start of bench_ASA.c ****/ void __attribute__((naked)) f(int count, void *rand) { asm volatile ( " push {r4, r5, r6, lr}\n" " mov r4, r0\n" " mov r5, r1\n" "0:\n" ".rept 4096\n" " blx r5\n" " tst r0, #1\n" " bne 1f\n" " b 2f\n" ".balign 64\n" "1:\n" ".rept 15\n" " add r0, r0, #0\n" ".endr\n" " b 3f\n" ".balign 64\n" "2:\n" ".rept 16\n" " add r0, r0, #0\n" ".endr\n" "3:\n" ".endr\n" " subs r4, r4, #1\n" " bgt 0b\n" " pop {r4, r5, r6, pc}\n" ); } int main() { f(1000, rand); return 0; } /**** end of bench_ASA.c ****/ Signed-off-by: Siarhei Siamashka --- arch/arm/cpu/armv7/omap3/cache.S | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/cache.S b/arch/arm/cpu/armv7/omap3/cache.S index cda87ba..2854771 100644 --- a/arch/arm/cpu/armv7/omap3/cache.S +++ b/arch/arm/cpu/armv7/omap3/cache.S @@ -169,7 +169,6 @@ setup_auxcr: orr r1, r3, r2, lsr #20-4 @ combine variant and revision mov r12, #0x3 mrc p15, 0, r0, c1, c0, 1 - orr r0, r0, #0x10 @ Enable ASA @ Enable L1NEON on pre-r2p1 (erratum 621766 workaround) cmp r1, #0x21 orrlt r0, r0, #1 << 5