diff mbox

[U-Boot] armv8: fsl-lsch3: Conditionally Remove errata a0009203 from lsch3 init

Message ID 1486027346-27594-1-git-send-email-Ashish.Kumar@nxp.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

Ashish Kumar Feb. 2, 2017, 9:22 a.m. UTC
This i2c errata is only valid for ls2080 and ls2088 SoC

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 4 ++++
 2 files changed, 8 insertions(+)

Comments

York Sun Feb. 7, 2017, 4:43 p.m. UTC | #1
On 02/02/2017 01:16 AM, Ashish Kumar wrote:
>  This i2c errata is only valid for ls2080 and ls2088 SoC
>
> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 4 ++++
>  2 files changed, 8 insertions(+)

The subject is a little bit confusing. It sounds like LS2085A is 
excluded. We only use LS2080A throughout U-Boot. The only place you see 
LS2085A and LS2088A is SVR related. Please either spell out each SoC, or 
use "LS2080A and its variants".

York
diff mbox

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 0ea43c6..d383cc9 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -71,6 +71,7 @@  config ARCH_LS2080A
 	select SYS_FSL_ERRATUM_A009803
 	select SYS_FSL_ERRATUM_A009942
 	select SYS_FSL_ERRATUM_A010165
+	select SYS_FSL_ERRATUM_A009203
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
 
@@ -278,6 +279,9 @@  config SYS_FSL_SDHC_CLK_DIV
 	  clock, in another word SDHC_clk = Platform_clk / this_divider.
 endmenu
 
+config SYS_FSL_ERRATUM_A009203
+	bool
+
 config SYS_FSL_ERRATUM_A008336
 	bool
 
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d64fe7b..1e95540 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -153,6 +153,7 @@  static void erratum_rcw_src(void)
  * This erratum requires setting glitch_en bit to enable
  * digital glitch filter to improve clock stability.
  */
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
 static void erratum_a009203(void)
 {
 	u8 __iomem *ptr;
@@ -179,6 +180,7 @@  static void erratum_a009203(void)
 #endif
 #endif
 }
+#endif
 
 void bypass_smmu(void)
 {
@@ -192,7 +194,9 @@  void fsl_lsch3_early_init_f(void)
 {
 	erratum_rcw_src();
 	init_early_memctl_regs();	/* tighten IFC timing */
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
 	erratum_a009203();
+#endif
 	erratum_a008514();
 	erratum_a008336();
 #ifdef CONFIG_CHAIN_OF_TRUST