diff mbox

[U-Boot,v3,12/13] sunxi: dts: add basic OrangePi PC 2 device tree file

Message ID 1485912970-7567-13-git-send-email-andre.przywara@arm.com
State Superseded
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Andre Przywara Feb. 1, 2017, 1:36 a.m. UTC
The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
and changing the differing components accordingly.
This is a preliminary device tree mostly for U-Boot's own sake, it
is expected to be updated once the official DT gets accepted upstream.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/dts/Makefile                   |   2 +
 arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 ++++++++++++++++++++++++++++++++
 2 files changed, 149 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-h5-orangepi-pc2.dts

Comments

Maxime Ripard Feb. 2, 2017, 12:27 p.m. UTC | #1
On Wed, Feb 01, 2017 at 01:36:09AM +0000, Andre Przywara wrote:
> The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
> Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
> and changing the differing components accordingly.
> This is a preliminary device tree mostly for U-Boot's own sake, it
> is expected to be updated once the official DT gets accepted upstream.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Maxime
Jagan Teki Feb. 3, 2017, 11:14 a.m. UTC | #2
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara <andre.przywara@arm.com> wrote:
> The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
> Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
> and changing the differing components accordingly.
> This is a preliminary device tree mostly for U-Boot's own sake, it
> is expected to be updated once the official DT gets accepted upstream.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/dts/Makefile                   |   2 +
>  arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 ++++++++++++++++++++++++++++++++

Please squash 13/13 with this, I would see a single patch for initial support.

thanks!
Andre Przywara Feb. 6, 2017, 10:18 a.m. UTC | #3
Hi,

On 03/02/17 11:14, Jagan Teki wrote:
> On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara <andre.przywara@arm.com> wrote:
>> The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
>> Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
>> and changing the differing components accordingly.
>> This is a preliminary device tree mostly for U-Boot's own sake, it
>> is expected to be updated once the official DT gets accepted upstream.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>>  arch/arm/dts/Makefile                   |   2 +
>>  arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 ++++++++++++++++++++++++++++++++
> 
> Please squash 13/13 with this, I would see a single patch for initial support.

How comes?
I think those two are really separate topics, and having a DT file in
this directory really doesn't hurt anything, until it actually gets
referenced in the next patch.
I'd keep DT patches separate, really, and in general always would prefer
more, but smaller patches to fewer, but bigger ones.

Cheers,
Andre.
Maxime Ripard Feb. 7, 2017, 3:11 p.m. UTC | #4
On Mon, Feb 06, 2017 at 10:18:14AM +0000, Andre Przywara wrote:
> Hi,
> 
> On 03/02/17 11:14, Jagan Teki wrote:
> > On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara <andre.przywara@arm.com> wrote:
> >> The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
> >> Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
> >> and changing the differing components accordingly.
> >> This is a preliminary device tree mostly for U-Boot's own sake, it
> >> is expected to be updated once the official DT gets accepted upstream.
> >>
> >> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> >> ---
> >>  arch/arm/dts/Makefile                   |   2 +
> >>  arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 ++++++++++++++++++++++++++++++++
> > 
> > Please squash 13/13 with this, I would see a single patch for initial support.
> 
> How comes?
> I think those two are really separate topics, and having a DT file in
> this directory really doesn't hurt anything, until it actually gets
> referenced in the next patch.
> I'd keep DT patches separate, really, and in general always would prefer
> more, but smaller patches to fewer, but bigger ones.

I concur.

Maxime
diff mbox

Patch

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 796b24d..aa90526 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -294,6 +294,8 @@  dtb-$(CONFIG_MACH_SUN8I_H3) += \
 	sun8i-h3-orangepi-plus.dtb \
 	sun8i-h3-orangepi-plus2e.dtb \
 	sun8i-h3-nanopi-neo.dtb
+dtb-$(CONFIG_MACH_SUN50I_H5) += \
+	sun50i-h5-orangepi-pc2.dtb
 dtb-$(CONFIG_MACH_SUN50I) += \
 	sun50i-a64-pine64-plus.dtb \
 	sun50i-a64-pine64.dtb
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
new file mode 100644
index 0000000..de60f78
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -0,0 +1,147 @@ 
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun8i-h3.dtsi"
+
+/ {
+	model = "OrangePi PC 2";
+	compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
+
+	cpus {
+		cpu@0 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			enable-method = "psci";
+		};
+		cpu@1 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			enable-method = "psci";
+		};
+		cpu@2 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			enable-method = "psci";
+		};
+		cpu@3 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			enable-method = "psci";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x40000000 0x40000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		ethernet0 = &emac;
+	};
+
+	soc {
+		reg_vcc3v3: vcc3v3 {
+			compatible = "regulator-fixed";
+			regulator-name = "vcc3v3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+		};
+	};
+};
+
+&gic {
+	compatible = "arm,gic-400";
+};
+
+&mmc0 {
+	compatible = "allwinner,sun50i-h5-mmc",
+		     "allwinner,sun50i-a64-mmc",
+		     "allwinner,sun5i-a13-mmc";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	cd-gpios = <&pio 5 6 0>;
+	cd-inverted;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_a>;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-mode = "rgmii";
+	phy = <&phy1>;
+	status = "okay";
+
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};