From patchwork Thu Nov 18 12:02:19 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Konrad Eisele X-Patchwork-Id: 72084 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 8E2A8B7167 for ; Thu, 18 Nov 2010 23:02:07 +1100 (EST) Received: (qmail 12106 invoked by alias); 18 Nov 2010 12:01:41 -0000 Received: (qmail 12036 invoked by uid 22791); 18 Nov 2010 12:01:38 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, TW_FC, TW_XV X-Spam-Check-By: sourceware.org Received: from mail202c2.megamailservers.com (HELO mail202c2.megamailservers.com) (69.49.111.103) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 18 Nov 2010 12:01:31 +0000 X-Authenticated-User: konrad.gaisler.com Received: from [192.168.0.29] (static-92-33-28-242.sme.bredbandsbolaget.se [92.33.28.242]) (authenticated bits=0) by mail202c2.megamailservers.com (8.13.6/8.13.1) with ESMTP id oAIC11G2030208; Thu, 18 Nov 2010 07:01:03 -0500 Message-ID: <4CE515CB.7080706@gaisler.com> Date: Thu, 18 Nov 2010 13:02:19 +0100 From: Konrad Eisele User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.15) Gecko/20101027 SeaMonkey/2.0.10 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org, ebotcazou@adacore.com CC: gcc@gcc.gnu.org, iant@google.com, =?ISO-8859-1?Q?Lu=EDs_Vit=F3rio_?= =?ISO-8859-1?Q?Cargnini?= , Daniel Hellstrom , Jiri Gaisler Subject: Adding Leon processor to the SPARC list of processors X-CSC: 0 X-CHA: v=1.1 cv=tSDqc4oFRGe0F8RY2CMaUuBS62cjHUEMuNqMpXUZOi8= c=1 sm=1 a=NcKphQ5OugsA:10 a=jXKJviUpWSOlMmIvGrHOfw==:17 a=ebG-ZW-8AAAA:8 a=XkLWVbynPfUEUJayzq8A:9 a=CEqNorUUuYEMCgNi1ykA:7 a=qp56aiiyWcrPBBjo0Uulb1rM7acA:4 a=wPNLvfGTeEIA:10 a=mDV3o1hIAAAA:8 a=xKmadIWH6YtlyWJdlcsA:9 a=6MZZR3Aj3l9rfA7BRkgA:7 a=RChf239lwsCC98icxjyCWQTKWQ0A:4 a=jXKJviUpWSOlMmIvGrHOfw==:117 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello, Jiri Gaisler has now signed the FSF copyleft (it took quite long to get through the procedure) and I was said that I could post the patches now. The patches are straightforward I think. 1. Adds machine description gcc-4.4.2/gcc/config/sparc/leon.md 2. gcc-4.4.2.ori/gcc/config/sparc/sparc.c: + adds leon_costs struct. + 4 target CPUs are added: sparchfleon : hard float v7 sparchfleonv8: hard float v8 sparcsfleon : soft float v7 sparcsfleonv8: soft float v8 + 1 cpu type: PROCESSOR_LEON that is called "leon" in sparc.md 3. gcc-4.4.2.ori/gcc/config/sparc/sparc.h: add the 4 target cpu defines 4. gcc-4.4.2.ori/gcc/config/sparc/sparc.md: define cpu "leon" and include "leon.md" 5. gcc-4.4.2/gcc/config/sparc/t-leon: makefile template for leon 6. gcc-4.4.2/gcc/config.gcc: include t-leon for sparc[sf|hf]leon[v8]. They dont interfere with current code. If I should change something, please let me know or maybe here is something I didnt think of... >Leon is a conforming implementation of the SPARC V7/V8 architecture so it >should be possible to support it alongside the other SPARC implementations in >the SPARC back-end of the mainline compiler. I'd be happy to review patches >to this effect (and I presume the other SPARC maintainers are OK with this). > >So I'd suggest that Luís Vitório and/or Konrad do the required paperwork, and >then start to post their patches on the gcc-patches@ list. I'll sponsor them >for write access at that point. > >-- Eric Botcazou I come back to the offer of Eric: if the patches are approved I'd be greatfull if you could check them in. -- Thanks Konrad To verify (if someone is interested): I have created a crosstool-ng based install script that will build the 4 sparc-leon cross-compilers: $wget ftp://gaisler.com/gaisler.com/linux/linuxbuild/linuxbuild-0.0.3.tar.bz2 $tar xvf linuxbuild-0.0.3.tar.bz2 $cd linuxbuild-0.0.3 $make help $make cts This will create /opt/sparc-linux-toolchains/{hfleon,hfleonv8,sfleon,sfleonv8} (Write premissions needed for /opt/sparc-linux-toolchains/). The crosstool-ng script uses --with-cpu=sparc[sf|hf]leon[v8] to select the desired proc type. diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/leon.md gcc-4.4.2/gcc/config/sparc/leon.md --- gcc-4.4.2.ori/gcc/config/sparc/leon.md 1970-01-01 01:00:00.000000000 +0100 +++ gcc-4.4.2/gcc/config/sparc/leon.md 2010-10-19 11:56:58.000000000 +0200 @@ -0,0 +1,56 @@ +;; Scheduling description for Leon. +;; Copyright (C) 2010 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . + + +(define_automaton "leon") + +(define_cpu_unit "leon_memory, leon_fpalu" "leon") +(define_cpu_unit "leon_fpmds" "leon") +(define_cpu_unit "write_buf" "leon") + +(define_insn_reservation "leon_load" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "load,sload,fpload")) + "leon_memory") + +(define_insn_reservation "leon_store" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "store,fpstore")) + "leon_memory+write_buf") + +(define_insn_reservation "leon_fp_alu" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fp,fpmove")) + "leon_fpalu, nothing") + +(define_insn_reservation "leon_fp_mult" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fpmul")) + "leon_fpmds, nothing") + +(define_insn_reservation "leon_fp_div" 16 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fpdivs,fpdivd")) + "leon_fpmds, nothing*15") + +(define_insn_reservation "leon_fp_sqrt" 23 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fpsqrts,fpsqrtd")) + "leon_fpmds, nothing*21") + diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/sparc.c gcc-4.4.2/gcc/config/sparc/sparc.c --- gcc-4.4.2.ori/gcc/config/sparc/sparc.c 2010-10-19 11:55:17.000000000 +0200 +++ gcc-4.4.2/gcc/config/sparc/sparc.c 2010-10-19 11:56:58.000000000 +0200 @@ -246,6 +246,30 @@ 0, /* shift penalty */ }; +static const +struct processor_costs leon_costs = { + COSTS_N_INSNS (1), /* int load */ + COSTS_N_INSNS (1), /* int signed load */ + COSTS_N_INSNS (1), /* int zeroed load */ + COSTS_N_INSNS (1), /* float load */ + COSTS_N_INSNS (1), /* fmov, fneg, fabs */ + COSTS_N_INSNS (1), /* fadd, fsub */ + COSTS_N_INSNS (1), /* fcmp */ + COSTS_N_INSNS (1), /* fmov, fmovr */ + COSTS_N_INSNS (1), /* fmul */ + COSTS_N_INSNS (15), /* fdivs */ + COSTS_N_INSNS (15), /* fdivd */ + COSTS_N_INSNS (23), /* fsqrts */ + COSTS_N_INSNS (23), /* fsqrtd */ + COSTS_N_INSNS (5), /* imul */ + COSTS_N_INSNS (5), /* imulX */ + 0, /* imul bit factor */ + COSTS_N_INSNS (5), /* idiv */ + COSTS_N_INSNS (5), /* idivX */ + COSTS_N_INSNS (1), /* movcc/movr */ + 0, /* shift penalty */ +}; + const struct processor_costs *sparc_costs = &cypress_costs; #ifdef HAVE_AS_RELAX_OPTION @@ -651,6 +675,10 @@ { TARGET_CPU_ultrasparc3, "ultrasparc3" }, { TARGET_CPU_niagara, "niagara" }, { TARGET_CPU_niagara2, "niagara2" }, + { TARGET_CPU_sparchfleon, "sparchfleon" }, + { TARGET_CPU_sparchfleonv8, "sparchfleonv8" }, + { TARGET_CPU_sparcsfleon, "sparcsfleon" }, + { TARGET_CPU_sparcsfleonv8, "sparcsfleonv8" }, { 0, 0 } }; const struct cpu_default *def; @@ -689,6 +717,11 @@ /* UltraSPARC T1 */ { "niagara", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS}, { "niagara2", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9}, + /* SPARC-LEON */ + { "sparchfleon", PROCESSOR_LEON, MASK_ISA, MASK_FPU }, + { "sparchfleonv8", PROCESSOR_LEON, MASK_ISA & ~(MASK_V8), MASK_V8|MASK_FPU }, + { "sparcsfleon", PROCESSOR_LEON, MASK_ISA | MASK_FPU, 0 }, + { "sparcsfleonv8", PROCESSOR_LEON, (MASK_ISA | MASK_FPU) & ~(MASK_V8), MASK_V8 }, { 0, 0, 0, 0 } }; const struct cpu_table *cpu; @@ -855,6 +888,9 @@ case PROCESSOR_NIAGARA2: sparc_costs = &niagara2_costs; break; + case PROCESSOR_LEON: + sparc_costs = &leon_costs; + break; }; #ifdef TARGET_DEFAULT_LONG_DOUBLE_128 diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/sparc.h gcc-4.4.2/gcc/config/sparc/sparc.h --- gcc-4.4.2.ori/gcc/config/sparc/sparc.h 2010-10-19 11:55:17.000000000 +0200 +++ gcc-4.4.2/gcc/config/sparc/sparc.h 2010-10-19 11:56:58.000000000 +0200 @@ -243,6 +243,10 @@ #define TARGET_CPU_ultrasparc3 9 #define TARGET_CPU_niagara 10 #define TARGET_CPU_niagara2 11 +#define TARGET_CPU_sparchfleon 12 +#define TARGET_CPU_sparchfleonv8 13 +#define TARGET_CPU_sparcsfleon 14 +#define TARGET_CPU_sparcsfleonv8 15 #if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \ || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \ @@ -299,6 +303,26 @@ #define ASM_CPU32_DEFAULT_SPEC "-Asparclite" #endif +#if TARGET_CPU_DEFAULT == TARGET_CPU_sparchfleon +#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon" +#define ASM_CPU32_DEFAULT_SPEC "" +#endif + +#if TARGET_CPU_DEFAULT == TARGET_CPU_sparcsfleon +#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon -D_SOFT_FLOAT" +#define ASM_CPU32_DEFAULT_SPEC "" +#endif + +#if TARGET_CPU_DEFAULT == TARGET_CPU_sparchfleonv8 +#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon -D__sparc_v8__ " +#define ASM_CPU32_DEFAULT_SPEC "" +#endif + +#if TARGET_CPU_DEFAULT == TARGET_CPU_sparcsfleonv8 +#define CPP_CPU32_DEFAULT_SPEC "-Dsparcleon -D__sparc_v8__ -D_SOFT_FLOAT" +#define ASM_CPU32_DEFAULT_SPEC "" +#endif + #if TARGET_CPU_DEFAULT == TARGET_CPU_supersparc #define CPP_CPU32_DEFAULT_SPEC "-D__supersparc__ -D__sparc_v8__" #define ASM_CPU32_DEFAULT_SPEC "" @@ -369,6 +393,10 @@ %{mcpu=ultrasparc3:-D__sparc_v9__} \ %{mcpu=niagara:-D__sparc_v9__} \ %{mcpu=niagara2:-D__sparc_v9__} \ +%{mcpu=sparchfleon:-Dsparcleon} \ +%{mcpu=sparchfleonv8:-Dsparcleon -D__sparc_v8__} \ +%{mcpu=sparcsfleon:-Dsparcleon -D_SOFT_FLOAT} \ +%{mcpu=sparcsfleonv8:-Dsparcleon -D_SOFT_FLOAT -D__sparc_v8__} \ %{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \ " #define CPP_ARCH32_SPEC "" @@ -533,6 +561,7 @@ PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, + PROCESSOR_LEON, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/sparc.md gcc-4.4.2/gcc/config/sparc/sparc.md --- gcc-4.4.2.ori/gcc/config/sparc/sparc.md 2010-10-19 11:55:17.000000000 +0200 +++ gcc-4.4.2/gcc/config/sparc/sparc.md 2010-10-19 11:56:58.000000000 +0200 @@ -89,6 +89,7 @@ "v7, cypress, v8, + leon, supersparc, sparclite,f930,f934, hypersparc,sparclite86x, @@ -320,6 +321,7 @@ (include "ultra3.md") (include "niagara.md") (include "niagara2.md") +(include "leon.md") ;; Operand and operator predicates and constraints diff -Naurb gcc-4.4.2.ori/gcc/config/sparc/t-leon gcc-4.4.2/gcc/config/sparc/t-leon --- gcc-4.4.2.ori/gcc/config/sparc/t-leon 1970-01-01 01:00:00.000000000 +0100 +++ gcc-4.4.2/gcc/config/sparc/t-leon 2010-10-19 11:56:58.000000000 +0200 @@ -0,0 +1,16 @@ +# configuration file for LEON cpu + +LIB1ASMSRC = sparc/lb1spc.asm +LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3 + +# We want fine grained libraries, so use the new code to build the +# floating point emulation libraries. +FPBIT = fp-bit.c +DPBIT = dp-bit.c + +dp-bit.c: $(srcdir)/config/fp-bit.c + cat $(srcdir)/config/fp-bit.c > dp-bit.c + +fp-bit.c: $(srcdir)/config/fp-bit.c + echo '#define FLOAT' > fp-bit.c + cat $(srcdir)/config/fp-bit.c >> fp-bit.c diff -Naurb gcc-4.4.2.ori/gcc/config.gcc gcc-4.4.2/gcc/config.gcc --- gcc-4.4.2.ori/gcc/config.gcc 2010-10-19 11:55:17.000000000 +0200 +++ gcc-4.4.2/gcc/config.gcc 2010-10-19 11:56:11.000000000 +0200 @@ -2978,6 +2978,9 @@ | v9 | ultrasparc | ultrasparc3 | niagara | niagara2) # OK ;; + sparchfleon | sparcsfleon | sparchfleonv8 | sparcsfleonv8 | leon) + tmake_file="${tmake_file} sparc/t-leon" + ;; *) echo "Unknown cpu used in --with-$which=$val" 1>&2 exit 1