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[U-Boot,v2,02/15] imx: spl: Update NAND bootmode detection bit

Message ID 1485526363-3834-3-git-send-email-jagan@openedev.com
State Accepted
Commit 20f147141698b9f302c3382fcc45a1ef1a341cec
Delegated to: Stefano Babic
Headers show

Commit Message

Jagan Teki Jan. 27, 2017, 2:12 p.m. UTC 
BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
---
 arch/arm/imx-common/spl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index a7f9705..fc3704b 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -61,8 +61,8 @@  u32 spl_boot_device(void)
 	case 0x6:
 	case 0x7:
 		return BOOT_DEVICE_MMC1;
-	/* NAND Flash: 8.5.2 */
-	case 0x8 ... 0xf:
+	/* NAND Flash: 8.5.2, Table 8-10 */
+	case 0x8:
 		return BOOT_DEVICE_NAND;
 	}
 	return BOOT_DEVICE_NONE;