@@ -1497,6 +1497,8 @@ static void __pci_reset(struct list_head *list)
void pci_reset(void)
{
unsigned int i;
+ struct pci_slot *slot;
+ int64_t rc;
prlog(PR_NOTICE, "PCI: Clearing all devices...\n");
@@ -1508,6 +1510,25 @@ void pci_reset(void)
if (!phb)
continue;
__pci_reset(&phb->devices);
+
+ slot = phb->slot;
+ if (!slot || !slot->ops.creset) {
+ PCINOTICE(phb, 0, "Can't do complete reset\n");
+ } else {
+ rc = slot->ops.creset(slot);
+ while (rc > 0) {
+ time_wait(rc);
+ rc = slot->ops.poll(slot);
+ }
+ if (rc < 0) {
+ PCIERR(phb, 0, "Complete reset failed, aborting"
+ "fast reboot (rc=%lld)\n", rc);
+ if (platform.cec_reboot)
+ platform.cec_reboot();
+ while (true) {}
+ }
+ }
+
if (phb->ops->ioda_reset)
phb->ops->ioda_reset(phb, true);
}
On fast reboot, perform a creset of all PHBs. This ensures that any PHBs that are fenced will be working after the reboot. A later patch will disable CAPI mode during cresets - as such, PHBs in CAPI mode will return to regular PCIe mode during a fast reboot. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> --- This slows down fast reboot a bit. Could we do this in parallel? Should we limit it only to fenced/CAPI mode PHBs? (Resetting all PHBs might make things slightly more reliable, but probably only slightly...) V2->V3 - suggestions from Gavin: * fix creset return code type * print rc when creset fails --- core/pci.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)