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[U-Boot,v2,01/13] sunxi: fix ACTLR.SMP assembly routine

Message ID 1485310967-3837-2-git-send-email-andre.przywara@arm.com
State Superseded
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Andre Przywara Jan. 25, 2017, 2:22 a.m. UTC 
If we take the liberty to use register r0 to perform our bit set, we
should be nice enough to tell the compiler about it.
Add r0 to the clobber list to avoid potential mayhem.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/mach-sunxi/board.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
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Patch

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 52be5b0..58fbacb 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -188,7 +188,8 @@  void s_init(void)
 	asm volatile(
 		"mrc p15, 0, r0, c1, c0, 1\n"
 		"orr r0, r0, #1 << 6\n"
-		"mcr p15, 0, r0, c1, c0, 1\n");
+		"mcr p15, 0, r0, c1, c0, 1\n"
+		::: "r0");
 #endif
 #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
 	/* Enable non-secure access to some peripherals */