Patchwork [U-Boot,1/4] MX51: iomux: Added support for mxc_iomux_set_input()

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Submitter David Jander
Date Aug. 19, 2010, 11:42 a.m.
Message ID <2742a1d58389e0f76fee54c9833ac4d98039a5c4.1282213859.git.david@protonic.nl>
Download mbox | patch
Permalink /patch/71820/
State Changes Requested
Delegated to: Stefano Babic
Headers show

Comments

David Jander - Aug. 19, 2010, 11:42 a.m.
Signed-off-by: David Jander <david@protonic.nl>
---
 arch/arm/cpu/armv7/mx51/iomux.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
Stefano Babic - Aug. 20, 2010, 8:10 a.m.
David Jander wrote:
> Signed-off-by: David Jander <david@protonic.nl>
> ---

Hi Dave,

>  arch/arm/cpu/armv7/mx51/iomux.c |    8 +++++++-
>  1 files changed, 7 insertions(+), 1 deletions(-)
> 

Probably iut is better you set a more useful comment in your commit.
Instead of "Added support for	mxc_iomux_set_input()", you can explain
which is the new feature you provide. Something to explain you add a
utility for the "daisy chain" pins, to control the input path to a
module when the module can be connected to more as one pin.

The patch is part of a series. However, I can see only the first two
patches. Is there something missing ? I do not see any relation between
these two patches, too.

> +void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
> +{
> +	u32 pad_reg = IOMUXSW_INPUT_CTL+(input*4);

Code styling, you should add spaces:

	u32 pad_reg = IOMUXSW_INPUT_CTL + (input * 4);

> +	writel(config, pad_reg);
> +}

Best regards,
Stefano Babic
David Jander - Aug. 20, 2010, 8:40 a.m.
Hi Stefano,

On Friday 20 August 2010 10:10:49 am Stefano Babic wrote: 
> Hi Dave,
> 
> >  arch/arm/cpu/armv7/mx51/iomux.c |    8 +++++++-
> >  1 files changed, 7 insertions(+), 1 deletions(-)
> 
> Probably iut is better you set a more useful comment in your commit.
> Instead of "Added support for	mxc_iomux_set_input()", you can explain
> which is the new feature you provide. Something to explain you add a
> utility for the "daisy chain" pins, to control the input path to a
> module when the module can be connected to more as one pin.

Hmmm. I thought it was a trivial and obviously missing function to make 
iomux.c complete. Someone just needed to write it. I didn't think it needed 
any more explaining than that, but I'll do it in the next version of the patch 
set (will take a while).

> The patch is part of a series. However, I can see only the first two
> patches. Is there something missing ? I do not see any relation between
> these two patches, too.

I sent 4 patches and received them all on the mailing-list. Are you sure you 
miss two of them?
The first three patches introduce some minimal fixes/additions in order to 
implement the BSP for PRTLVT2 boards (patch 4/4).

> > +void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
> > +{
> > +	u32 pad_reg = IOMUXSW_INPUT_CTL+(input*4);
> 
> Code styling, you should add spaces:
> 
> 	u32 pad_reg = IOMUXSW_INPUT_CTL + (input * 4);

Ok.

Best regards,
Stefano Babic - Aug. 20, 2010, 9:08 a.m.
David Jander wrote:
> Hi Stefano,
> 

Hi David,

> Hmmm. I thought it was a trivial and obviously missing function to make 
> iomux.c complete.
> Someone just needed to write it. I didn't think it needed 
> any more explaining than that, but I'll do it in the next version of the patch 
> set (will take a while).

Not everybody works with the MX51, and if we do not write some
additional info it is difficult to find a relation in the reference
manual ;-).

> I sent 4 patches and received them all on the mailing-list. Are you sure you 
> miss two of them?

I have found them on gmane now, thanks.

Best regards,
Stefano

Patch

diff --git a/arch/arm/cpu/armv7/mx51/iomux.c b/arch/arm/cpu/armv7/mx51/iomux.c
index 62b2954..fb48f1c 100644
--- a/arch/arm/cpu/armv7/mx51/iomux.c
+++ b/arch/arm/cpu/armv7/mx51/iomux.c
@@ -34,7 +34,7 @@  enum iomux_reg_addr {
 	IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR,
 	IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + MUX_I_END,
 	IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + PAD_I_START,
-	IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR,
+	IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + INPUT_CTL_START,
 };
 
 #define MUX_PIN_NUM_MAX (((MUX_I_END - MUX_I_START) >> 2) + 1)
@@ -164,3 +164,9 @@  unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin)
 	u32 pad_reg = get_pad_reg(pin);
 	return readl(pad_reg);
 }
+
+void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
+{
+	u32 pad_reg = IOMUXSW_INPUT_CTL+(input*4);
+	writel(config, pad_reg);
+}