Patchwork [U-Boot] OpenRD: Bring PCIe endpoint out of reset

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Submitter Tanmay Upadhyay
Date April 20, 2010, 5:51 a.m.
Message ID <1271742668-2424-1-git-send-email-tanmay.upadhyay@einfochips.com>
Download mbox | patch
Permalink /patch/71771/
State Superseded
Delegated to: Prafulla Wadaskar
Headers show

Comments

Tanmay Upadhyay - April 20, 2010, 5:51 a.m.
There exists PCIe endpoints(not all) that remains in reset state till
PERST# line (A11 on the PCIe connector) is hold low. They come out of
reset only when this line is high.

In case of OpenRD, this line was in tri-state. So, some of the PCIe
devices would never appear on the PCIe bus. This patch makes PERST#
line high while booting to bring such PCIe devices out of reset.

XGI Vollari Z11 GPU and Intel WiFi 4965 are the ones who doesn't care
about this line. Where as Broadcom's BCM970012 won't appear on the PCIe
bus until PERST# is high. With this patch both kinds of device would
appear on the PCIe bus.

Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Signed-off-by: Dhaval Vasa <dhaval.vasa@einfochips.com>
---
 board/Marvell/openrd_base/openrd_base.h |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
Prafulla Wadaskar - April 30, 2010, 6:49 a.m.
> -----Original Message-----
> From: Tanmay Upadhyay [mailto:tanmay.upadhyay@einfochips.com] 
> Sent: Tuesday, April 20, 2010 11:21 AM
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Tanmay Upadhyay; Dhaval Vasa
> Subject: [PATCH] OpenRD: Bring PCIe endpoint out of reset
> 
> There exists PCIe endpoints(not all) that remains in reset state till
> PERST# line (A11 on the PCIe connector) is hold low. They come out of
> reset only when this line is high.
> 
> In case of OpenRD, this line was in tri-state. So, some of the PCIe
> devices would never appear on the PCIe bus. This patch makes PERST#
> line high while booting to bring such PCIe devices out of reset.
> 
> XGI Vollari Z11 GPU and Intel WiFi 4965 are the ones who doesn't care
> about this line. Where as Broadcom's BCM970012 won't appear 
> on the PCIe
> bus until PERST# is high. With this patch both kinds of device would
> appear on the PCIe bus.

Well, there is some problem indeed on OpenRD board regarding PCIe.
This patch did not helped me to test the hardware that I have.

I have Matrox 550 graphics card on PCIe,
I have enabled respective support in the kernel and tried to bring it up.
This patch did not helped me for successful bring up.

Whereas, if I use u-boot from official release (that comes with board) everything works fine.
And that does not have this patch.

So I think this is not perfect resolution for this problem.
We need to dig more into the issue.

Copying Simon..

Regards..
Prafulla . .

Patch

diff --git a/board/Marvell/openrd_base/openrd_base.h b/board/Marvell/openrd_base/openrd_base.h
index f3daf17..bf75fc6 100644
--- a/board/Marvell/openrd_base/openrd_base.h
+++ b/board/Marvell/openrd_base/openrd_base.h
@@ -30,10 +30,10 @@ 
 #ifndef __OPENRD_BASE_H
 #define __OPENRD_BASE_H
 
-#define OPENRD_OE_LOW		(~(1<<28))        /* RS232 / RS485 */
-#define OPENRD_OE_HIGH		(~(1<<2))         /* SD / UART1 */
-#define OPENRD_OE_VAL_LOW		(0)       /* Sel RS232 */
-#define OPENRD_OE_VAL_HIGH		(1 << 2)  /* Sel SD */
+#define OPENRD_OE_LOW		(~((1<<28) | (1<<7)))  /* RS232 / RS485, PCIe */
+#define OPENRD_OE_HIGH		(~(1<<2))              /* SD / UART1 */
+#define OPENRD_OE_VAL_LOW	(1<<7)        /* Sel RS232, PCIe out of reset */
+#define OPENRD_OE_VAL_HIGH	(1 << 2)      /* Sel SD */
 
 /* PHY related */
 #define MV88E1116_LED_FCTRL_REG		10